//===----------------------------------------------------------------------===//
#include "BBLiveVar.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/Support/CFG.h"
//
//===----------------------------------------------------------------------===//
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
-#include "BBLiveVar.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/Support/CFG.h"
#include "Support/PostOrderIterator.h"
#include "Support/SetOperations.h"
#include "Support/CommandLine.h"
+#include "BBLiveVar.h"
static RegisterAnalysis<FunctionLiveVarInfo>
X("livevar", "Live Variable Analysis");
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h"
#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" // FIXME: Remove when modularized better
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/BasicBlock.h"
#include "Support/CommandLine.h"
cerr << "\n*** TRACE OF INSTRUCTION SCHEDULING OPERATIONS\n\n";
// expensive!
- SchedPriorities schedPrio(&F, graph,getAnalysis<FunctionLiveVarInfo>());
+ SchedPriorities schedPrio(&F, graph, getAnalysis<FunctionLiveVarInfo>());
SchedulingManager S(target, graph, schedPrio);
ChooseInstructionsForDelaySlots(S, MBB, graph); // modifies graph
//===----------------------------------------------------------------------===//
#include "SchedPriorities.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/Support/CFG.h"
#include "Support/PostOrderIterator.h"
#include "llvm/CodeGen/MachineInstrAnnot.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionInfo.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
#include "llvm/Analysis/LoopInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetFrameInfo.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineCodeForInstruction.h"
#include "llvm/CodeGen/MachineFunction.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h" // FIXME: Remove when modularized better
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/BasicBlock.h"
#include "Support/CommandLine.h"
cerr << "\n*** TRACE OF INSTRUCTION SCHEDULING OPERATIONS\n\n";
// expensive!
- SchedPriorities schedPrio(&F, graph,getAnalysis<FunctionLiveVarInfo>());
+ SchedPriorities schedPrio(&F, graph, getAnalysis<FunctionLiveVarInfo>());
SchedulingManager S(target, graph, schedPrio);
ChooseInstructionsForDelaySlots(S, MBB, graph); // modifies graph
//===----------------------------------------------------------------------===//
#include "SchedPriorities.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/Support/CFG.h"
#include "Support/PostOrderIterator.h"
//===----------------------------------------------------------------------===//
#include "BBLiveVar.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineBasicBlock.h"
#include "llvm/Support/CFG.h"
//
//===----------------------------------------------------------------------===//
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
-#include "BBLiveVar.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/Support/CFG.h"
#include "Support/PostOrderIterator.h"
#include "Support/SetOperations.h"
#include "Support/CommandLine.h"
+#include "BBLiveVar.h"
static RegisterAnalysis<FunctionLiveVarInfo>
X("livevar", "Live Variable Analysis");
#include "llvm/CodeGen/MachineInstrAnnot.h"
#include "llvm/CodeGen/MachineFunction.h"
#include "llvm/CodeGen/MachineFunctionInfo.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h"
#include "llvm/Analysis/LoopInfo.h"
#include "llvm/Target/TargetMachine.h"
#include "llvm/Target/TargetFrameInfo.h"
#include "llvm/CodeGen/MachineInstr.h"
#include "llvm/CodeGen/MachineInstrAnnot.h"
#include "llvm/CodeGen/RegAllocCommon.h"
-#include "llvm/Analysis/LiveVar/FunctionLiveVarInfo.h"
+#include "llvm/CodeGen/FunctionLiveVarInfo.h" // FIXME: Remove
#include "llvm/iTerminators.h"
#include "llvm/iOther.h"
#include "llvm/Function.h"
#include "llvm/DerivedTypes.h"
-#include <values.h>
using std::cerr;
using std::vector;
+enum {
+ BadRegClass = ~0
+};
+
UltraSparcRegInfo::UltraSparcRegInfo(const UltraSparc &tgt)
: TargetRegInfo(tgt), NumOfIntArgRegs(6),
NumOfFloatArgRegs(32), InvalidRegNum(1000) {
assert(LR && "No live range found for method arg");
unsigned regType = getRegType(LR);
- unsigned regClassIDOfArgReg = MAXINT; // reg class of chosen reg (unused)
+ unsigned regClassIDOfArgReg = BadRegClass; // reg class of chosen reg (unused)
int regNum = (regType == IntRegType)
? regNumForIntArg(/*inCallee*/ true, isVarArgs,
//
bool isArgInReg = false;
unsigned UniArgReg = InvalidRegNum; // reg that LR MUST be colored with
- unsigned regClassIDOfArgReg = MAXINT; // reg class of chosen reg
+ unsigned regClassIDOfArgReg = BadRegClass; // reg class of chosen reg
int regNum = (regType == IntRegType)
? regNumForIntArg(/*inCallee*/ true, isVarArgs,
"all args (even consts) must be defined before");
unsigned regType = getRegType( LR );
- unsigned regClassIDOfArgReg = MAXINT; // reg class of chosen reg (unused)
+ unsigned regClassIDOfArgReg = BadRegClass; // reg class of chosen reg (unused)
// Choose a register for this arg depending on whether it is
// an INT or FP value. Here we ignore whether or not it is a
{
MachineInstr *AdMI;
bool isArgInReg = false;
- unsigned UniArgReg = MAXINT; // unused unless initialized below
+ unsigned UniArgReg = BadRegClass; // unused unless initialized below
if (UniArgRegOrNone != InvalidRegNum)
{
isArgInReg = true;
//
bool isArgInReg = false;
unsigned UniArgReg = InvalidRegNum; // reg that LR MUST be colored with
- unsigned regClassIDOfArgReg = MAXINT; // reg class of chosen reg
+ unsigned regClassIDOfArgReg = BadRegClass; // reg class of chosen reg
// Find the register that must be used for this arg, depending on
// whether it is an INT or FP value. Here we ignore whether or not it