]> granicus.if.org Git - python/commitdiff
Issue #8313: traceback.format_exception_only() encodes unicode message to
authorVictor Stinner <victor.stinner@haypocalc.com>
Wed, 5 May 2010 12:40:49 +0000 (12:40 +0000)
committerVictor Stinner <victor.stinner@haypocalc.com>
Wed, 5 May 2010 12:40:49 +0000 (12:40 +0000)
ASCII with backslashreplace error handler if str(value) failed

Lib/test/test_traceback.py
Lib/traceback.py
Misc/NEWS

index c79961e0c4e0c75cef209d98a715d8dd60c2c66f..811feac4990a4bce878d262ee792de8d526340f5 100644 (file)
@@ -159,6 +159,15 @@ def test():
         err = traceback.format_exception_only(None, None)
         self.assertEqual(err, ['None\n'])
 
+    def test_unicode(self):
+        err = AssertionError('\xff')
+        lines = traceback.format_exception_only(type(err), err)
+        self.assertEqual(lines, ['AssertionError: \xff\n'])
+
+        err = AssertionError(u'\xe9')
+        lines = traceback.format_exception_only(type(err), err)
+        self.assertEqual(lines, ['AssertionError: \\xe9\n'])
+
 
 class TracebackFormatTests(unittest.TestCase):
 
index 8d28afc0cd00800cab8fa56fdece9af4c8d02296..8cb9e281fce5632862b69def93f5850728d3a4de 100644 (file)
@@ -211,8 +211,14 @@ def _format_final_exc_line(etype, value):
 def _some_str(value):
     try:
         return str(value)
-    except:
-        return '<unprintable %s object>' % type(value).__name__
+    except Exception:
+        pass
+    try:
+        value = unicode(value)
+        return value.encode("ascii", "backslashreplace")
+    except Exception:
+        pass
+    return '<unprintable %s object>' % type(value).__name__
 
 
 def print_exc(limit=None, file=None):
index 38fae31dc00057300507cdfa66d8ac70605f5b45..4f8684ae5255e8b74597a1231a954e9a9fa068fc 100644 (file)
--- a/Misc/NEWS
+++ b/Misc/NEWS
@@ -39,6 +39,9 @@ Core and Builtins
 Library
 -------
 
+- Issue #8313: traceback.format_exception_only() encodes unicode message to
+  ASCII with backslashreplace error handler if str(value) failed
+
 - Issue #8567: Fix precedence of signals in Decimal module: when a
   Decimal operation raises multiple signals and more than one of those
   signals is trapped, the specification determines the order in which