]> granicus.if.org Git - clang/commitdiff
[X86] Custom emit __builtin_rdtscp so we can emit an explicit store for the out parameter
authorCraig Topper <craig.topper@intel.com>
Fri, 7 Sep 2018 19:14:24 +0000 (19:14 +0000)
committerCraig Topper <craig.topper@intel.com>
Fri, 7 Sep 2018 19:14:24 +0000 (19:14 +0000)
This is the clang side of D51803. The llvm intrinsic now returns two results. So we need to emit an explicit store in IR for the out parameter. This is similar to addcarry/subborrow/rdrand/rdseed.

Differential Revision: https://reviews.llvm.org/D51805

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@341699 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/CGBuiltin.cpp
test/CodeGen/rd-builtins.c

index a472bf59d71758be6ed25e8fa2874acb984f3219..90505ac088d83fe77e48e2dcf54c02074f0710bc 100644 (file)
@@ -9158,6 +9158,12 @@ Value *CodeGenFunction::EmitX86BuiltinExpr(unsigned BuiltinID,
   case X86::BI__rdtsc: {
     return Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_rdtsc));
   }
+  case X86::BI__builtin_ia32_rdtscp: {
+    Value *Call = Builder.CreateCall(CGM.getIntrinsic(Intrinsic::x86_rdtscp));
+    Builder.CreateDefaultAlignedStore(Builder.CreateExtractValue(Call, 1),
+                                      Ops[0]);
+    return Builder.CreateExtractValue(Call, 0);
+  }
   case X86::BI__builtin_ia32_undef128:
   case X86::BI__builtin_ia32_undef256:
   case X86::BI__builtin_ia32_undef512:
index 0d7cd04d6f26bc84a827162465de470e1db450de..38e0886f0325880d7679f6310911f50ee251acc9 100644 (file)
@@ -14,3 +14,12 @@ int test_rdtsc() {
 // CHECK: @test_rdtsc
 // CHECK: call i64 @llvm.x86.rdtsc
 }
+
+unsigned long long test_rdtscp(unsigned int *a) {
+// CHECK: @test_rdtscp
+// CHECK: [[RDTSCP:%.*]] = call { i64, i32 } @llvm.x86.rdtscp
+// CHECK: [[TSC_AUX:%.*]] = extractvalue { i64, i32 } [[RDTSCP]], 1
+// CHECK: store i32 [[TSC_AUX]], i32* %{{.*}}
+// CHECK: [[TSC:%.*]] = extractvalue { i64, i32 } [[RDTSCP]], 0
+  return __rdtscp(a);
+}