[AArch64][SVE2] Asm: add integer unary instructions (predicated)

Summary:
Patch adds support for the following instructions:

    * URECPE, URSQRTE, SQABS, SQNEG

The specification can be found here:
https://developer.arm.com/docs/ddi0602/latest

Reviewed By: SjoerdMeijer

Differential Revision: https://reviews.llvm.org/D62129

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361230 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/AArch64/AArch64SVEInstrInfo.td b/lib/Target/AArch64/AArch64SVEInstrInfo.td
index a51f968056dbe64f2e7038ea007232658c42b7e4..62dfdf1345aae9bfea3b99c5311e44cb42700d5f 100644 (file)
--- a/lib/Target/AArch64/AArch64SVEInstrInfo.td
+++ b/lib/Target/AArch64/AArch64SVEInstrInfo.td
@@ -1134,6 +1134,12 @@ let Predicates = [HasSVE2] in {
   defm SMINP_ZPmZ : sve2_int_arith_pred<0b101101, "sminp">;
   defm UMINP_ZPmZ : sve2_int_arith_pred<0b101111, "uminp">;
 
+  // SVE2 integer unary operations (predicated)
+  defm URECPE_ZPmZ  : sve2_int_un_pred_arit_s<0b000, "urecpe">;
+  defm URSQRTE_ZPmZ : sve2_int_un_pred_arit_s<0b001, "ursqrte">;
+  defm SQABS_ZPmZ   : sve2_int_un_pred_arit<0b100, "sqabs">;
+  defm SQNEG_ZPmZ   : sve2_int_un_pred_arit<0b101, "sqneg">;
+
   // SVE2 integer multiply long
   defm SQDMULLB_ZZZ : sve2_wide_int_arith_long<0b11000, "sqdmullb">;
   defm SQDMULLT_ZZZ : sve2_wide_int_arith_long<0b11001, "sqdmullt">;

diff --git a/lib/Target/AArch64/SVEInstrFormats.td b/lib/Target/AArch64/SVEInstrFormats.td
index 027b2ec85f976a8c539881de5e473918d172f18f..79f2dab932f9e7260f7d1627ae52806e89f51b9b 100644 (file)
--- a/lib/Target/AArch64/SVEInstrFormats.td
+++ b/lib/Target/AArch64/SVEInstrFormats.td
@@ -2117,6 +2117,42 @@ multiclass sve2_int_sadd_long_accum_pairwise<bit U, string asm> {
   def _D : sve2_int_sadd_long_accum_pairwise<0b11, U, asm, ZPR64, ZPR32>;
 }
 
+class sve2_int_un_pred_arit<bits<2> sz, bit Q, bits<2> opc,
+                            string asm, ZPRRegOp zprty>
+: I<(outs zprty:$Zd), (ins zprty:$_Zd, PPR3bAny:$Pg, zprty:$Zn),
+  asm, "\t$Zd, $Pg/m, $Zn",
+  "",
+  []>, Sched<[]> {
+  bits<3> Pg;
+  bits<5> Zd;
+  bits<5> Zn;
+  let Inst{31-24} = 0b01000100;
+  let Inst{23-22} = sz;
+  let Inst{21-20} = 0b00;
+  let Inst{19}    = Q;
+  let Inst{18}    = 0b0;
+  let Inst{17-16} = opc;
+  let Inst{15-13} = 0b101;
+  let Inst{12-10} = Pg;
+  let Inst{9-5}   = Zn;
+  let Inst{4-0}   = Zd;
+
+  let Constraints = "$Zd = $_Zd";
+  let DestructiveInstType = Destructive;
+  let ElementSize = zprty.ElementSize;
+}
+
+multiclass sve2_int_un_pred_arit_s<bits<3> opc, string asm> {
+  def _S : sve2_int_un_pred_arit<0b10, opc{2}, opc{1-0}, asm, ZPR32>;
+}
+
+multiclass sve2_int_un_pred_arit<bits<3> opc, string asm> {
+  def _B : sve2_int_un_pred_arit<0b00, opc{2}, opc{1-0}, asm, ZPR8>;
+  def _H : sve2_int_un_pred_arit<0b01, opc{2}, opc{1-0}, asm, ZPR16>;
+  def _S : sve2_int_un_pred_arit<0b10, opc{2}, opc{1-0}, asm, ZPR32>;
+  def _D : sve2_int_un_pred_arit<0b11, opc{2}, opc{1-0}, asm, ZPR64>;
+}
+
 //===----------------------------------------------------------------------===//
 // SVE2 Widening Integer Arithmetic Group
 //===----------------------------------------------------------------------===//

diff --git a/test/MC/AArch64/SVE2/sqabs-diagnostics.s b/test/MC/AArch64/SVE2/sqabs-diagnostics.s
new file mode 100644 (file)
index 0000000..2b51870
--- /dev/null
+++ b/test/MC/AArch64/SVE2/sqabs-diagnostics.s
@@ -0,0 +1,23 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2  2>&1 < %s| FileCheck %s
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+sqabs z0.s, p0/z, z1.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: sqabs z0.s, p0/z, z1.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqabs z0.s, p8/m, z1.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: sqabs z0.s, p8/m, z1.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid element width
+
+sqabs z0.b, p7/m, z1.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: sqabs z0.b, p7/m, z1.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

diff --git a/test/MC/AArch64/SVE2/sqabs.s b/test/MC/AArch64/SVE2/sqabs.s
new file mode 100644 (file)
index 0000000..23c7c57
--- /dev/null
+++ b/test/MC/AArch64/SVE2/sqabs.s
@@ -0,0 +1,60 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+sqabs z31.b, p7/m, z31.b
+// CHECK-INST: sqabs z31.b, p7/m, z31.b
+// CHECK-ENCODING: [0xff,0xbf,0x08,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ff bf 08 44 <unknown>
+
+sqabs z31.h, p7/m, z31.h
+// CHECK-INST: sqabs z31.h, p7/m, z31.h
+// CHECK-ENCODING: [0xff,0xbf,0x48,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ff bf 48 44 <unknown>
+
+sqabs z31.s, p7/m, z31.s
+// CHECK-INST: sqabs z31.s, p7/m, z31.s
+// CHECK-ENCODING: [0xff,0xbf,0x88,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ff bf 88 44 <unknown>
+
+sqabs z31.d, p7/m, z31.d
+// CHECK-INST: sqabs z31.d, p7/m, z31.d
+// CHECK-ENCODING: [0xff,0xbf,0xc8,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ff bf c8 44 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.s, p7/z, z6.s
+// CHECK-INST: movprfx z4.s, p7/z, z6.s
+// CHECK-ENCODING: [0xc4,0x3c,0x90,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c 90 04 <unknown>
+
+sqabs z4.s, p7/m, z31.s
+// CHECK-INST: sqabs z4.s, p7/m, z31.s
+// CHECK-ENCODING: [0xe4,0xbf,0x88,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: e4 bf 88 44 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+sqabs z4.s, p7/m, z31.s
+// CHECK-INST: sqabs z4.s, p7/m, z31.s
+// CHECK-ENCODING: [0xe4,0xbf,0x88,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: e4 bf 88 44 <unknown>

diff --git a/test/MC/AArch64/SVE2/sqneg-diagnostics.s b/test/MC/AArch64/SVE2/sqneg-diagnostics.s
new file mode 100644 (file)
index 0000000..a078a13
--- /dev/null
+++ b/test/MC/AArch64/SVE2/sqneg-diagnostics.s
@@ -0,0 +1,23 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2  2>&1 < %s| FileCheck %s
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+sqneg z0.s, p0/z, z1.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: sqneg z0.s, p0/z, z1.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+sqneg z0.s, p8/m, z1.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: sqneg z0.s, p8/m, z1.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid element width
+
+sqneg z0.b, p7/m, z1.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: sqneg z0.b, p7/m, z1.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

diff --git a/test/MC/AArch64/SVE2/sqneg.s b/test/MC/AArch64/SVE2/sqneg.s
new file mode 100644 (file)
index 0000000..a66d576
--- /dev/null
+++ b/test/MC/AArch64/SVE2/sqneg.s
@@ -0,0 +1,60 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+sqneg z31.b, p7/m, z31.b
+// CHECK-INST: sqneg z31.b, p7/m, z31.b
+// CHECK-ENCODING: [0xff,0xbf,0x09,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ff bf 09 44 <unknown>
+
+sqneg z31.h, p7/m, z31.h
+// CHECK-INST: sqneg z31.h, p7/m, z31.h
+// CHECK-ENCODING: [0xff,0xbf,0x49,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ff bf 49 44 <unknown>
+
+sqneg z31.s, p7/m, z31.s
+// CHECK-INST: sqneg z31.s, p7/m, z31.s
+// CHECK-ENCODING: [0xff,0xbf,0x89,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ff bf 89 44 <unknown>
+
+sqneg z31.d, p7/m, z31.d
+// CHECK-INST: sqneg z31.d, p7/m, z31.d
+// CHECK-ENCODING: [0xff,0xbf,0xc9,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ff bf c9 44 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.s, p7/z, z6.s
+// CHECK-INST: movprfx z4.s, p7/z, z6.s
+// CHECK-ENCODING: [0xc4,0x3c,0x90,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c 90 04 <unknown>
+
+sqneg z4.s, p7/m, z31.s
+// CHECK-INST: sqneg z4.s, p7/m, z31.s
+// CHECK-ENCODING: [0xe4,0xbf,0x89,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: e4 bf 89 44 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+sqneg z4.s, p7/m, z31.s
+// CHECK-INST: sqneg z4.s, p7/m, z31.s
+// CHECK-ENCODING: [0xe4,0xbf,0x89,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: e4 bf 89 44 <unknown>

diff --git a/test/MC/AArch64/SVE2/urecpe-diagnostics.s b/test/MC/AArch64/SVE2/urecpe-diagnostics.s
new file mode 100644 (file)
index 0000000..71bece5
--- /dev/null
+++ b/test/MC/AArch64/SVE2/urecpe-diagnostics.s
@@ -0,0 +1,33 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2  2>&1 < %s| FileCheck %s
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+urecpe z0.s, p0/z, z1.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: urecpe z0.s, p0/z, z1.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+urecpe z0.s, p8/m, z1.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: urecpe z0.s, p8/m, z1.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid element width
+
+urecpe z0.b, p7/m, z1.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: urecpe z0.b, p7/m, z1.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+urecpe z0.h, p7/m, z1.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: urecpe z0.h, p7/m, z1.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+urecpe z0.d, p7/m, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: urecpe z0.d, p7/m, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

diff --git a/test/MC/AArch64/SVE2/urecpe.s b/test/MC/AArch64/SVE2/urecpe.s
new file mode 100644 (file)
index 0000000..3687e6f
--- /dev/null
+++ b/test/MC/AArch64/SVE2/urecpe.s
@@ -0,0 +1,42 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+urecpe z31.s, p7/m, z31.s
+// CHECK-INST: urecpe z31.s, p7/m, z31.s
+// CHECK-ENCODING: [0xff,0xbf,0x80,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ff bf 80 44 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.s, p7/z, z6.s
+// CHECK-INST: movprfx z4.s, p7/z, z6.s
+// CHECK-ENCODING: [0xc4,0x3c,0x90,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c 90 04 <unknown>
+
+urecpe z4.s, p7/m, z31.s
+// CHECK-INST: urecpe z4.s, p7/m, z31.s
+// CHECK-ENCODING: [0xe4,0xbf,0x80,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: e4 bf 80 44 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+urecpe z4.s, p7/m, z31.s
+// CHECK-INST: urecpe z4.s, p7/m, z31.s
+// CHECK-ENCODING: [0xe4,0xbf,0x80,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: e4 bf 80 44 <unknown>

diff --git a/test/MC/AArch64/SVE2/ursqrte-diagnostics.s b/test/MC/AArch64/SVE2/ursqrte-diagnostics.s
new file mode 100644 (file)
index 0000000..43cdefe
--- /dev/null
+++ b/test/MC/AArch64/SVE2/ursqrte-diagnostics.s
@@ -0,0 +1,33 @@
+// RUN: not llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2  2>&1 < %s| FileCheck %s
+
+// ------------------------------------------------------------------------- //
+// Invalid predicate
+
+ursqrte z0.s, p0/z, z1.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid operand for instruction
+// CHECK-NEXT: ursqrte z0.s, p0/z, z1.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ursqrte z0.s, p8/m, z1.s
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: restricted predicate has range [0, 7].
+// CHECK-NEXT: ursqrte z0.s, p8/m, z1.s
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+
+// ------------------------------------------------------------------------- //
+// Invalid element width
+
+ursqrte z0.b, p7/m, z1.b
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: ursqrte z0.b, p7/m, z1.b
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ursqrte z0.h, p7/m, z1.h
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: ursqrte z0.h, p7/m, z1.h
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:
+
+ursqrte z0.d, p7/m, z1.d
+// CHECK: [[@LINE-1]]:{{[0-9]+}}: error: invalid element width
+// CHECK-NEXT: ursqrte z0.d, p7/m, z1.d
+// CHECK-NOT: [[@LINE-1]]:{{[0-9]+}}:

diff --git a/test/MC/AArch64/SVE2/ursqrte.s b/test/MC/AArch64/SVE2/ursqrte.s
new file mode 100644 (file)
index 0000000..a6280e5
--- /dev/null
+++ b/test/MC/AArch64/SVE2/ursqrte.s
@@ -0,0 +1,42 @@
+// RUN: llvm-mc -triple=aarch64 -show-encoding -mattr=+sve2 < %s \
+// RUN:        | FileCheck %s --check-prefixes=CHECK-ENCODING,CHECK-INST
+// RUN: not llvm-mc -triple=aarch64 -show-encoding < %s 2>&1 \
+// RUN:        | FileCheck %s --check-prefix=CHECK-ERROR
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d -mattr=+sve2 - | FileCheck %s --check-prefix=CHECK-INST
+// RUN: llvm-mc -triple=aarch64 -filetype=obj -mattr=+sve2 < %s \
+// RUN:        | llvm-objdump -d - | FileCheck %s --check-prefix=CHECK-UNKNOWN
+
+ursqrte z31.s, p7/m, z31.s
+// CHECK-INST: ursqrte z31.s, p7/m, z31.s
+// CHECK-ENCODING: [0xff,0xbf,0x81,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: ff bf 81 44 <unknown>
+
+
+// --------------------------------------------------------------------------//
+// Test compatibility with MOVPRFX instruction.
+
+movprfx z4.s, p7/z, z6.s
+// CHECK-INST: movprfx z4.s, p7/z, z6.s
+// CHECK-ENCODING: [0xc4,0x3c,0x90,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 3c 90 04 <unknown>
+
+ursqrte z4.s, p7/m, z31.s
+// CHECK-INST: ursqrte z4.s, p7/m, z31.s
+// CHECK-ENCODING: [0xe4,0xbf,0x81,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: e4 bf 81 44 <unknown>
+
+movprfx z4, z6
+// CHECK-INST: movprfx z4, z6
+// CHECK-ENCODING: [0xc4,0xbc,0x20,0x04]
+// CHECK-ERROR: instruction requires: sve
+// CHECK-UNKNOWN: c4 bc 20 04 <unknown>
+
+ursqrte z4.s, p7/m, z31.s
+// CHECK-INST: ursqrte z4.s, p7/m, z31.s
+// CHECK-ENCODING: [0xe4,0xbf,0x81,0x44]
+// CHECK-ERROR: instruction requires: sve2
+// CHECK-UNKNOWN: e4 bf 81 44 <unknown>