]> granicus.if.org Git - llvm/commitdiff
[AArch64] Add lowering pattern for llvm.aarch64.neon.vcvtfxs2fp.f16.i64
authorDiogo N. Sampaio <diogo.sampaio@arm.com>
Thu, 11 Apr 2019 14:19:43 +0000 (14:19 +0000)
committerDiogo N. Sampaio <diogo.sampaio@arm.com>
Thu, 11 Apr 2019 14:19:43 +0000 (14:19 +0000)
Summary:  Add lowering pattern for llvm.aarch64.neon.vcvtfxs2fp.f16.i64

Reviewers: pbarrio, DavidSpickett, LukeGeeson

Reviewed By: LukeGeeson

Subscribers: javed.absar, kristof.beyls, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D60259

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358171 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AArch64/AArch64InstrInfo.td
test/CodeGen/AArch64/fp16_intrinsic_scalar_2op.ll

index 06d25bb3e37561396adea2e7cbc50c4cd1b4405a..7dad458d80e5f056b951a7ef77c1e2648cd02e50 100644 (file)
@@ -5327,6 +5327,8 @@ def : Pat<(f16 (int_aarch64_neon_vcvtfxs2fp (i32 (sext_inreg FPR32:$Rn, i16)), v
           (SCVTFh (EXTRACT_SUBREG FPR32:$Rn, hsub), vecshiftR16:$imm)>;
 def : Pat<(f16 (int_aarch64_neon_vcvtfxs2fp (i32 FPR32:$Rn), vecshiftR16:$imm)),
           (SCVTFh (EXTRACT_SUBREG FPR32:$Rn, hsub), vecshiftR16:$imm)>;
+def : Pat<(f16 (int_aarch64_neon_vcvtfxs2fp (i64 FPR64:$Rn), vecshiftR16:$imm)),
+          (SCVTFh (EXTRACT_SUBREG FPR64:$Rn, hsub), vecshiftR16:$imm)>;
 def : Pat<(f16 (int_aarch64_neon_vcvtfxu2fp
             (and FPR32:$Rn, (i32 65535)),
             vecshiftR16:$imm)),
index 19365a6f2f768be27abf9eba19ab9e248ae93366..04da29888e735b1e53049a80ad2eb9af574f361f 100644 (file)
@@ -342,3 +342,13 @@ entry:
   %0 = trunc i32 %facg to i16
   ret i16 %0
 }
+
+define dso_local half @vcvth_n_f16_s64_test(i64 %a) {
+; CHECK-LABEL: vcvth_n_f16_s64_test:
+; CHECK:       fmov    d0, x0
+; CHECK-NEXT:  scvtf   h0, h0, #16
+; CHECK-NEXT:  ret
+entry:
+  %vcvth_n_f16_s64 = tail call half @llvm.aarch64.neon.vcvtfxs2fp.f16.i64(i64 %a, i32 16)
+  ret half %vcvth_n_f16_s64
+}