let BPFSrc = 0; // BPF_K
let BPFClass = 7; // BPF_ALU64
}
-def MOV_rr : MOV_RR<"mov">;
-def MOV_ri : MOV_RI<"mov">;
class LD_IMM64<bits<4> Pseudo, string OpcodeStr>
: InstBPF<(outs GPR:$dst), (ins u64imm:$imm),
let size = 3; // BPF_DW
let BPFClass = 0; // BPF_LD
}
+
+let isReMaterializable = 1, isAsCheapAsAMove = 1 in {
def LD_imm64 : LD_IMM64<0, "ld_64">;
+def MOV_rr : MOV_RR<"mov">;
+def MOV_ri : MOV_RI<"mov">;
+}
def LD_pseudo
: InstBPF<(outs GPR:$dst), (ins i64imm:$pseudo, u64imm:$imm),
}
; CHECK-LABEL: store_imm:
-; CHECK: stw 0(r1), r0
-; CHECK: stw 4(r2), r0
+; CHECK: stw 0(r1), r{{[03]}}
+; CHECK: stw 4(r2), r{{[03]}}
define i32 @store_imm(i32* %a, i32* %b) {
entry:
store i32 0, i32* %a, align 4