[globalisel][regbank] Warn about MIR ambiguities when register bank/class names clash.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@317132 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/TableGen/Error.h b/include/llvm/TableGen/Error.h
index 3df658df8809abca6a0c966f0524c1b329bae498..de4d3bf5478230c8c19d7bd8aac21a2128965a5b 100644 (file)
--- a/include/llvm/TableGen/Error.h
+++ b/include/llvm/TableGen/Error.h
@@ -19,6 +19,8 @@
 
 namespace llvm {
 
+void PrintNote(ArrayRef<SMLoc> NoteLoc, const Twine &Msg);
+
 void PrintWarning(ArrayRef<SMLoc> WarningLoc, const Twine &Msg);
 void PrintWarning(const char *Loc, const Twine &Msg);
 void PrintWarning(const Twine &Msg);

diff --git a/lib/TableGen/Error.cpp b/lib/TableGen/Error.cpp
index fd089356625404acc667f73957927be08be87699..b4830178a269def85d02deca3bd6c66749b06a88 100644 (file)
--- a/lib/TableGen/Error.cpp
+++ b/lib/TableGen/Error.cpp
@@ -39,6 +39,10 @@ static void PrintMessage(ArrayRef<SMLoc> Loc, SourceMgr::DiagKind Kind,
                         "instantiated from multiclass");
 }
 
+void PrintNote(ArrayRef<SMLoc> NoteLoc, const Twine &Msg) {
+  PrintMessage(NoteLoc, SourceMgr::DK_Note, Msg);
+}
+
 void PrintWarning(ArrayRef<SMLoc> WarningLoc, const Twine &Msg) {
   PrintMessage(WarningLoc, SourceMgr::DK_Warning, Msg);
 }

diff --git a/utils/TableGen/RegisterBankEmitter.cpp b/utils/TableGen/RegisterBankEmitter.cpp
index 293933ffb8d27f5557d4c0970a38eccd2559d8e5..5c6471688044e9e57328e804ffa945253f11eb8a 100644 (file)
--- a/utils/TableGen/RegisterBankEmitter.cpp
+++ b/utils/TableGen/RegisterBankEmitter.cpp
@@ -299,6 +299,19 @@ void RegisterBankEmitter::run(raw_ostream &OS) {
     Banks.push_back(Bank);
   }
 
+  // Warn about ambiguous MIR caused by register bank/class name clashes.
+  for (const auto &Class : Records.getAllDerivedDefinitions("RegisterClass")) {
+    for (const auto &Bank : Banks) {
+      if (Bank.getName().lower() == Class->getName().lower()) {
+        PrintWarning(Bank.getDef().getLoc(), "Register bank names should be "
+                                             "distinct from register classes "
+                                             "to avoid ambiguous MIR");
+        PrintNote(Bank.getDef().getLoc(), "RegisterBank was declared here");
+        PrintNote(Class->getLoc(), "RegisterClass was declared here");
+      }
+    }
+  }
+
   emitSourceFileHeader("Register Bank Source Fragments", OS);
   OS << "#ifdef GET_REGBANK_DECLARATIONS\n"
      << "#undef GET_REGBANK_DECLARATIONS\n";