[X86][XOP] Add test case for PR31296

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@288858 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/X86/vector-shuffle-combining-xop.ll b/test/CodeGen/X86/vector-shuffle-combining-xop.ll
index 707cafe9931eac279dff3127443f89181cf8abad..41c1866de0d0441ca1d694f13f2d499988a9a839 100644 (file)
--- a/test/CodeGen/X86/vector-shuffle-combining-xop.ll
+++ b/test/CodeGen/X86/vector-shuffle-combining-xop.ll
@@ -341,3 +341,23 @@ define <16 x i8> @constant_fold_vpperm() {
   %1 = call <16 x i8> @llvm.x86.xop.vpperm(<16 x i8> <i8 0, i8 -1, i8 -2, i8 -3, i8 -4, i8 -5, i8 -6, i8 -7, i8 -8, i8 -9, i8 -10, i8 -11, i8 -12, i8 -13, i8 -14, i8 -15>, <16 x i8> <i8 15, i8 14, i8 13, i8 12, i8 11, i8 10, i8 9, i8 8, i8 7, i8 6, i8 5, i8 4, i8 3, i8 2, i8 1, i8 0>, <16 x i8> <i8 31, i8 30, i8 29, i8 28, i8 27, i8 26, i8 25, i8 24, i8 23, i8 22, i8 21, i8 20, i8 19, i8 18, i8 17, i8 16>)
   ret <16 x i8> %1
 }
+
+define <4 x float> @PR31296(i8* %in) {
+; X32-LABEL: PR31296:
+; X32:       # BB#0: # %entry
+; X32-NEXT:    vmovaps {{.*#+}} xmm0 = [1.000000e+00,0.000000e+00,0.000000e+00,1.000000e+00]
+; X32-NEXT:    retl
+;
+; X64-LABEL: PR31296:
+; X64:       # BB#0: # %entry
+; X64-NEXT:    vmovaps {{.*#+}} xmm0 = [1.000000e+00,0.000000e+00,0.000000e+00,1.000000e+00]
+; X64-NEXT:    retq
+entry:
+  %0 = getelementptr i8, i8* %in, i32 0
+  %1 = bitcast i8* %0 to i32*
+  %2 = load i32, i32* %1
+  %3 = zext i32 %2 to i128
+  %4 = bitcast i128 %3 to <4 x float>
+  %5 = shufflevector <4 x float> %4, <4 x float> <float 0.000000e+00, float 1.000000e+00, float undef, float undef>, <4 x i32> <i32 0, i32 4, i32 4, i32 5>
+  ret <4 x float> %5
+}