Use the i8 immediate cmp instructions when possible.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@232378 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86FastISel.cpp b/lib/Target/X86/X86FastISel.cpp
index a8260c2161f087883baf64e6b523a1f6aa899a1b..c10393f0ca783b88bd7b519790153d0068b10863 100644 (file)
--- a/lib/Target/X86/X86FastISel.cpp
+++ b/lib/Target/X86/X86FastISel.cpp
@@ -1097,6 +1097,7 @@ static unsigned X86ChooseCmpOpcode(EVT VT, const X86Subtarget *Subtarget) {
 /// If we have a comparison with RHS as the RHS  of the comparison, return an
 /// opcode that works for the compare (e.g. CMP32ri) otherwise return 0.
 static unsigned X86ChooseCmpImmediateOpcode(EVT VT, const ConstantInt *RHSC) {
+  int64_t Val = RHSC->getSExtValue();
   switch (VT.getSimpleVT().SimpleTy) {
   // Otherwise, we can't fold the immediate into this comparison.
   default:
@@ -1104,13 +1105,19 @@ static unsigned X86ChooseCmpImmediateOpcode(EVT VT, const ConstantInt *RHSC) {
   case MVT::i8:
     return X86::CMP8ri;
   case MVT::i16:
+    if (isInt<8>(Val))
+      return X86::CMP16ri8;
     return X86::CMP16ri;
   case MVT::i32:
+    if (isInt<8>(Val))
+      return X86::CMP32ri8;
     return X86::CMP32ri;
   case MVT::i64:
+    if (isInt<8>(Val))
+      return X86::CMP64ri8;
     // 64-bit comparisons are only valid if the immediate fits in a 32-bit sext
     // field.
-    if ((int)RHSC->getSExtValue() == RHSC->getSExtValue())
+    if (isInt<32>(Val))
       return X86::CMP64ri32;
     return 0;
   }

diff --git a/test/CodeGen/X86/cmp-fast-isel.ll b/test/CodeGen/X86/cmp-fast-isel.ll
new file mode 100644 (file)
index 0000000..39738fa
--- /dev/null
+++ b/test/CodeGen/X86/cmp-fast-isel.ll
@@ -0,0 +1,45 @@
+; RUN: llc -mtriple=x86_64-linux -fast-isel -show-mc-encoding < %s | FileCheck %s
+
+; pr22854
+
+define i32 @f1(i16 %x) {
+; CHECK-LABEL: f1:
+; CHECK: cmpw  $42, %di               # encoding: [0x66,0x83,0xff,0x2a]
+bb0:
+  %cmp = icmp ne i16 %x, 42
+  br i1 %cmp, label %bb3, label %bb7
+
+bb3:
+  ret i32 1
+
+bb7:
+  ret i32 2
+}
+
+define i32 @f2(i32 %x) {
+; CHECK-LABEL: f2:
+; CHECK: cmpl  $42, %edi               # encoding: [0x83,0xff,0x2a]
+bb0:
+  %cmp = icmp ne i32 %x, 42
+  br i1 %cmp, label %bb3, label %bb7
+
+bb3:
+  ret i32 1
+
+bb7:
+  ret i32 2
+}
+
+define i32 @f3(i64 %x) {
+; CHECK-LABEL: f3:
+; CHECK: cmpq  $42, %rdi               # encoding: [0x48,0x83,0xff,0x2a]
+bb0:
+  %cmp = icmp ne i64 %x, 42
+  br i1 %cmp, label %bb3, label %bb7
+
+bb3:
+  ret i32 1
+
+bb7:
+  ret i32 2
+}

diff --git a/test/DebugInfo/X86/debug-loc-offset.ll b/test/DebugInfo/X86/debug-loc-offset.ll
index 7a2390887cbbe425ac0fc86a0c0d42116b58f79c..56a0c7f4e9b74bde1d0281276de4631e529b522f 100644 (file)
--- a/test/DebugInfo/X86/debug-loc-offset.ll
+++ b/test/DebugInfo/X86/debug-loc-offset.ll
@@ -55,7 +55,7 @@
 
 ; CHECK: .debug_loc contents:
 ; CHECK: 0x00000000: Beginning address offset: 0x0000000000000000
-; CHECK:                Ending address offset: 0x000000000000001a
+; CHECK:                Ending address offset: 0x0000000000000017
 
 %struct.A = type { i32 (...)**, i32 }
 

diff --git a/test/DebugInfo/X86/fission-ranges.ll b/test/DebugInfo/X86/fission-ranges.ll
index a4c10fe1673dc76f105e490d6446e9f96563507f..57bce098f4ff237d846b37d0174dc72aa04daa3e 100644 (file)
--- a/test/DebugInfo/X86/fission-ranges.ll
+++ b/test/DebugInfo/X86/fission-ranges.ll
@@ -25,20 +25,20 @@
 ; if they've changed due to a bugfix, change in register allocation, etc.
 
 ; CHECK: [[A]]: Beginning address index: 2
-; CHECK-NEXT:                    Length: 179
+; CHECK-NEXT:                    Length: 169
 ; CHECK-NEXT:      Location description: 11 00
 ; CHECK-NEXT: {{^$}}
 ; CHECK-NEXT:   Beginning address index: 3
-; CHECK-NEXT:                    Length: 23
+; CHECK-NEXT:                    Length: 21
 ; CHECK-NEXT:      Location description: 50 93 04
 ; CHECK: [[E]]: Beginning address index: 4
-; CHECK-NEXT:                    Length: 21
+; CHECK-NEXT:                    Length: 19
 ; CHECK-NEXT:      Location description: 50 93 04
 ; CHECK: [[B]]: Beginning address index: 5
-; CHECK-NEXT:                    Length: 19
+; CHECK-NEXT:                    Length: 17
 ; CHECK-NEXT:      Location description: 50 93 04
 ; CHECK: [[D]]: Beginning address index: 6
-; CHECK-NEXT:                    Length: 23
+; CHECK-NEXT:                    Length: 17
 ; CHECK-NEXT:      Location description: 50 93 04
 
 ; Make sure we don't produce any relocations in any .dwo section (though in particular, debug_info.dwo)