[SelectionDAGBuilder] Restrict vector reduction check to types with a power of 2...

The check for the shuffles usages probably isn't correct for non power of 2 vectors.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337651 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
index 73a07d56a419afd5ee85b720811e5420840bb6c6..59b0e625baf1dc0aa7192e94c729333c7df91ab3 100644 (file)
--- a/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
+++ b/lib/CodeGen/SelectionDAG/SelectionDAGBuilder.cpp
@@ -2668,6 +2668,10 @@ static bool isVectorReductionOp(const User *I) {
   }
 
   unsigned ElemNum = Inst->getType()->getVectorNumElements();
+  // Ensure the reduction size is a power of 2.
+  if (!isPowerOf2_32(ElemNum))
+    return false;
+
   unsigned ElemNumToReduce = ElemNum;
 
   // Do DFS search on the def-use chain from the given instruction. We only