]> granicus.if.org Git - llvm/commitdiff
[ARM] GlobalISel: Get rid of ARMInstructionSelector.h. NFC.
authorDiana Picus <diana.picus@linaro.org>
Fri, 28 Apr 2017 09:10:38 +0000 (09:10 +0000)
committerDiana Picus <diana.picus@linaro.org>
Fri, 28 Apr 2017 09:10:38 +0000 (09:10 +0000)
Declare the ARMInstructionSelector in an anonymous namespace, to make it
more in line with the other targets which were migrated to this in
r299637 in order to avoid TableGen'erated headers being included in
non-GlobalISel builds.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@301632 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/ARM/ARM.h
lib/Target/ARM/ARMInstructionSelector.cpp
lib/Target/ARM/ARMTargetMachine.cpp

index 39f7988200ea8904e09e531dd5c46ae62e8e3ba3..8d136edc262da857b444ec25de17de85857aff6b 100644 (file)
@@ -23,9 +23,12 @@ namespace llvm {
 
 class ARMAsmPrinter;
 class ARMBaseTargetMachine;
+class ARMRegisterBankInfo;
+class ARMSubtarget;
 struct BasicBlockInfo;
 class Function;
 class FunctionPass;
+class InstructionSelector;
 class MachineBasicBlock;
 class MachineFunction;
 class MachineInstr;
@@ -43,6 +46,9 @@ FunctionPass *createThumb2ITBlockPass();
 FunctionPass *createARMOptimizeBarriersPass();
 FunctionPass *createThumb2SizeReductionPass(
     std::function<bool(const Function &)> Ftor = nullptr);
+InstructionSelector *
+createARMInstructionSelector(const ARMSubtarget &STI,
+                             const ARMRegisterBankInfo &RBI);
 
 void LowerARMMachineInstrToMCInst(const MachineInstr *MI, MCInst &OutMI,
                                   ARMAsmPrinter &AP);
index 1c13d51a468e19b2fbd1437b88e3045dd032723f..8ce8e322fe09bf1eb51ba65d3a918401b2116b9f 100644 (file)
 /// \todo This should be generated by TableGen.
 //===----------------------------------------------------------------------===//
 
-#include "ARMInstructionSelector.h"
 #include "ARMRegisterBankInfo.h"
 #include "ARMSubtarget.h"
 #include "ARMTargetMachine.h"
+#include "llvm/CodeGen/GlobalISel/InstructionSelector.h"
 #include "llvm/CodeGen/MachineRegisterInfo.h"
 #include "llvm/Support/Debug.h"
 
@@ -26,6 +26,29 @@ using namespace llvm;
 #error "You shouldn't build this"
 #endif
 
+namespace {
+class ARMInstructionSelector : public InstructionSelector {
+public:
+  ARMInstructionSelector(const ARMSubtarget &STI,
+                         const ARMRegisterBankInfo &RBI);
+
+  bool select(MachineInstr &I) const override;
+
+private:
+  const ARMBaseInstrInfo &TII;
+  const ARMBaseRegisterInfo &TRI;
+  const ARMRegisterBankInfo &RBI;
+};
+} // end anonymous namespace
+
+namespace llvm {
+InstructionSelector *
+createARMInstructionSelector(const ARMSubtarget &STI,
+                             const ARMRegisterBankInfo &RBI) {
+  return new ARMInstructionSelector(STI, RBI);
+}
+}
+
 ARMInstructionSelector::ARMInstructionSelector(const ARMSubtarget &STI,
                                                const ARMRegisterBankInfo &RBI)
     : InstructionSelector(), TII(*STI.getInstrInfo()),
index b8dadb331ecf6033e4436036d796f155452ae3be..5bf827cc390fa4c1ddb926fed7ed813f956a74bb 100644 (file)
@@ -12,7 +12,6 @@
 
 #include "ARM.h"
 #include "ARMCallLowering.h"
-#include "ARMInstructionSelector.h"
 #include "ARMLegalizerInfo.h"
 #include "ARMRegisterBankInfo.h"
 #include "ARMSubtarget.h"
@@ -339,7 +338,7 @@ ARMBaseTargetMachine::getSubtargetImpl(const Function &F) const {
     // FIXME: At this point, we can't rely on Subtarget having RBI.
     // It's awkward to mix passing RBI and the Subtarget; should we pass
     // TII/TRI as well?
-    GISel->InstSelector.reset(new ARMInstructionSelector(*I, *RBI));
+    GISel->InstSelector.reset(createARMInstructionSelector(*I, *RBI));
 
     GISel->RegBankInfo.reset(RBI);
 #endif