using namespace TargetOpcode;
const LLT S1= LLT::scalar(1);
+ const LLT V2S16 = LLT::vector(2, 16);
const LLT S32 = LLT::scalar(32);
const LLT S64 = LLT::scalar(64);
const LLT P1 = LLT::pointer(1, 64);
setAction({G_ADD, S32}, Legal);
+ setAction({G_BITCAST, V2S16}, Legal);
+ setAction({G_BITCAST, 1, S32}, Legal);
+
+ setAction({G_BITCAST, S32}, Legal);
+ setAction({G_BITCAST, 1, V2S16}, Legal);
+
// FIXME: i1 operands to intrinsics should always be legal, but other i1
// values may not be legal. We need to figure out how to distinguish
// between these two scenarios.
--- /dev/null
+# RUN: llc -mtriple=amdgcn-mesa-mesa3d -mcpu=fiji -run-pass=legalizer -global-isel %s -o - | FileCheck %s
+
+--- |
+ define void @test_bitcast() { ret void }
+...
+
+---
+name: test_bitcast
+registers:
+ - { id: 0, class: _ }
+ - { id: 1, class: _ }
+ - { id: 2, class: _ }
+body: |
+ bb.0:
+ liveins: %vgpr0
+ ; CHECK-LABEL: name: test_bitcast
+ ; CHECK: %1(<2 x s16>) = G_BITCAST %0
+ ; CHECK: %2(s32) = G_BITCAST %1
+
+ %0(s32) = COPY %vgpr0
+ %1(<2 x s16>) = G_BITCAST %0
+ %2(s32) = G_BITCAST %1
+...