bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
llvm::Value *Address) const override;
+
+ unsigned getOpenMPSimdDefaultAlignment(QualType) const override {
+ return 16; // Natural alignment for Altivec vectors.
+ }
};
}
bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
llvm::Value *Address) const override;
+
+ unsigned getOpenMPSimdDefaultAlignment(QualType) const override {
+ return 16; // Natural alignment for Altivec and VSX vectors.
+ }
};
class PPC64TargetCodeGenInfo : public DefaultTargetCodeGenInfo {
bool initDwarfEHRegSizeTable(CodeGen::CodeGenFunction &CGF,
llvm::Value *Address) const override;
+
+ unsigned getOpenMPSimdDefaultAlignment(QualType) const override {
+ return 16; // Natural alignment for Altivec vectors.
+ }
};
}
// RUN: %clang_cc1 -fopenmp=libiomp5 -triple x86_64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
+// RUN: %clang_cc1 -fopenmp=libiomp5 -triple powerpc64-unknown-unknown -emit-llvm %s -o - | FileCheck %s
void h1(float *c, float *a, double b[], int size)
{