This adds support for the ACLE hint intrinsics on AArch64 similar to ARM. This
is required to properly support ACLE on AArch64.
git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@212890
91177308-0d34-0410-b5e6-
96231b3b80d8
BUILTIN(__builtin_arm_rbit, "UiUi", "nc")
BUILTIN(__builtin_arm_rbit64, "LUiLUi", "nc")
+// HINT
+BUILTIN(__builtin_arm_yield, "v", "")
+BUILTIN(__builtin_arm_wfe, "v", "")
+BUILTIN(__builtin_arm_wfi, "v", "")
+BUILTIN(__builtin_arm_sev, "v", "")
+BUILTIN(__builtin_arm_sevl, "v", "")
+
// CRC32
BUILTIN(__builtin_arm_crc32b, "UiUiUc", "nc")
BUILTIN(__builtin_arm_crc32cb, "UiUiUc", "nc")
Value *CodeGenFunction::EmitAArch64BuiltinExpr(unsigned BuiltinID,
const CallExpr *E) {
+ unsigned HintID = static_cast<unsigned>(-1);
+ switch (BuiltinID) {
+ default: break;
+ case AArch64::BI__builtin_arm_yield:
+ HintID = 1;
+ break;
+ case AArch64::BI__builtin_arm_wfe:
+ HintID = 2;
+ break;
+ case AArch64::BI__builtin_arm_wfi:
+ HintID = 3;
+ break;
+ case AArch64::BI__builtin_arm_sev:
+ HintID = 4;
+ break;
+ case AArch64::BI__builtin_arm_sevl:
+ HintID = 5;
+ break;
+ }
+
+ if (HintID != static_cast<unsigned>(-1)) {
+ Function *F = CGM.getIntrinsic(Intrinsic::aarch64_hint);
+ return Builder.CreateCall(F, llvm::ConstantInt::get(Int32Ty, HintID));
+ }
+
if (BuiltinID == AArch64::BI__builtin_arm_rbit) {
assert((getContext().getTypeSize(E->getType()) == 32) &&
"rbit of unusual size!");
#include <arm_acle.h>
+/* Hints */
+
+// ARM-LABEL: test_yield
+// AArch32: call void @llvm.arm.hint(i32 1)
+// AArch64: call void @llvm.aarch64.hint(i32 1)
+void test_yield(void) {
+ __yield();
+}
+
+// ARM-LABEL: test_wfe
+// AArch32: call void @llvm.arm.hint(i32 2)
+// AArch64: call void @llvm.aarch64.hint(i32 2)
+void test_wfe(void) {
+ __wfe();
+}
+
+// ARM-LABEL: test_wfi
+// AArch32: call void @llvm.arm.hint(i32 3)
+// AArch64: call void @llvm.aarch64.hint(i32 3)
+void test_wfi(void) {
+ __wfi();
+}
+
+// ARM-LABEL: test_sev
+// AArch32: call void @llvm.arm.hint(i32 4)
+// AArch64: call void @llvm.aarch64.hint(i32 4)
+void test_sev(void) {
+ __sev();
+}
+
+// ARM-LABEL: test_sevl
+// AArch32: call void @llvm.arm.hint(i32 5)
+// AArch64: call void @llvm.aarch64.hint(i32 5)
+void test_sevl(void) {
+ __sevl();
+}
+
/* 9 DATA-PROCESSING INTRINSICS */
/* 9.2 Miscellaneous data-processing intrinsics */
// ARM-LABEL: test_rev