[PowerPC][NFC] Avoid checking non-relevant .cfi instructions

Summary:
This is brought up in
https://reviews.llvm.org/D64662?id=209923#inline-599490

CFI information are non-relevant to quite some testcases,
we should get rid of checking them when its unecessary.

This patch avoid generating cfi info in testcases that are not
testing prolog/epilog or exception handling.

Reviewers: kbarton, hfinkel, nemanjai, #powerpc

Reviewed By: hfinkel

Subscribers: MaskRay, shchenz, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67016

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@370505 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/PowerPC/MCSE-caller-preserved-reg.ll b/test/CodeGen/PowerPC/MCSE-caller-preserved-reg.ll
index 05e6d7b5616093c8c8c58ca1592c0dfa6d63ce81..717b568e0465bdb0db1832873774a235b1d49359 100644 (file)
--- a/test/CodeGen/PowerPC/MCSE-caller-preserved-reg.ll
+++ b/test/CodeGen/PowerPC/MCSE-caller-preserved-reg.ll
@@ -1,3 +1,4 @@
+; NOTE: Assertions have been autogenerated by utils/update_llc_test_checks.py
 ; RUN: llc -relocation-model=pic -verify-machineinstrs -mtriple=powerpc64le-unknown-linux-gnu < %s | FileCheck %s
 ; The instructions addis,addi, bl are used to calculate the address of TLS
 ; thread local variables. These TLS access code sequences are generated
@@ -12,13 +13,11 @@
 
 @_ZN2CC2ccE = external thread_local global %"struct.CC::TT", align 8
 
-define noalias i8* @_ZN2CC3funEv(%class.CC* %this) {
+define noalias i8* @_ZN2CC3funEv(%class.CC* %this) nounwind {
 ; CHECK-LABEL: _ZN2CC3funEv:
-; CHECK:    mflr 0
-; CHECK-NEXT:    .cfi_def_cfa_offset 48
-; CHECK-NEXT:    .cfi_offset lr, 16
-; CHECK-NEXT:    .cfi_offset r30, -16
-; CHECK-NEXT:    std 30, -16(1)
+; CHECK:       # %bb.0: # %entry
+; CHECK-NEXT:    mflr 0
+; CHECK-NEXT:    std 30, -16(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std 0, 16(1)
 ; CHECK-NEXT:    stdu 1, -48(1)
 ; CHECK-NEXT:    std 2, 24(1)
@@ -34,15 +33,17 @@ define noalias i8* @_ZN2CC3funEv(%class.CC* %this) {
 ; CHECK-NEXT:    ld 4, 0(3)
 ; CHECK-NEXT:    cmpldi 4, 0
 ; CHECK-NEXT:    beq 0, .LBB0_2
-; CHECK:    addi 4, 3, 8
+; CHECK-NEXT:  # %bb.1: # %if.then
+; CHECK-NEXT:    addi 4, 3, 8
 ; CHECK-NEXT:    mr 3, 30
 ; CHECK-NEXT:    bl _ZN2CC3barEPi
 ; CHECK-NEXT:    nop
-; CHECK:    li 3, 0
+; CHECK-NEXT:  .LBB0_2: # %if.end
+; CHECK-NEXT:    li 3, 0
 ; CHECK-NEXT:    addi 1, 1, 48
 ; CHECK-NEXT:    ld 0, 16(1)
 ; CHECK-NEXT:    mtlr 0
-; CHECK:    ld 30, -16(1)
+; CHECK-NEXT:    ld 30, -16(1) # 8-byte Folded Reload
 ; CHECK-NEXT:    blr
 entry:
   %foo = getelementptr inbounds %class.CC, %class.CC* %this, i64 0, i32 0, i32 0

diff --git a/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll b/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
index 5ecce5ed4d964bf7988f365ccf4a8c939b5a50c7..9db7ec63215a2c0b922a8bb72cdd527d2b194de2 100644 (file)
--- a/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
+++ b/test/CodeGen/PowerPC/PR35812-neg-cmpxchg.ll
@@ -8,14 +8,12 @@
 @str.1 = private unnamed_addr constant [59 x i8] c"FAILED: __atomic_compare_exchange_n() set the wrong value.\00"
 @str.2 = private unnamed_addr constant [7 x i8] c"PASSED\00"
 
-define signext i32 @main() {
+define signext i32 @main() nounwind {
 ; CHECK-LABEL: main:
 ; CHECK:       # %bb.0: # %L.entry
 ; CHECK-NEXT:    mflr 0
 ; CHECK-NEXT:    std 0, 16(1)
 ; CHECK-NEXT:    stdu 1, -48(1)
-; CHECK-NEXT:    .cfi_def_cfa_offset 48
-; CHECK-NEXT:    .cfi_offset lr, 16
 ; CHECK-NEXT:    li 3, -32477
 ; CHECK-NEXT:    li 6, 234
 ; CHECK-NEXT:    addi 5, 1, 46
@@ -72,8 +70,6 @@ define signext i32 @main() {
 ; CHECK-P7-NEXT:    mflr 0
 ; CHECK-P7-NEXT:    std 0, 16(1)
 ; CHECK-P7-NEXT:    stdu 1, -48(1)
-; CHECK-P7-NEXT:    .cfi_def_cfa_offset 48
-; CHECK-P7-NEXT:    .cfi_offset lr, 16
 ; CHECK-P7-NEXT:    li 3, -32477
 ; CHECK-P7-NEXT:    lis 5, 0
 ; CHECK-P7-NEXT:    addi 4, 1, 46

diff --git a/test/CodeGen/PowerPC/float-load-store-pair.ll b/test/CodeGen/PowerPC/float-load-store-pair.ll
index 17e71c531a0089cabd006fc7bb889f4180191dab..a8ed39ee9ce0e6d2244dd0a36241ae140ce8258f 100644 (file)
--- a/test/CodeGen/PowerPC/float-load-store-pair.ll
+++ b/test/CodeGen/PowerPC/float-load-store-pair.ll
@@ -25,14 +25,12 @@
 
 ; Because this test function is trying to pass float argument by stack,
 ; so the fpr is only used to load/store float argument
-define signext i32 @test() {
+define signext i32 @test() nounwind {
 ; CHECK-LABEL: test:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    mflr 0
 ; CHECK-NEXT:    std 0, 16(1)
 ; CHECK-NEXT:    stdu 1, -192(1)
-; CHECK-NEXT:    .cfi_def_cfa_offset 192
-; CHECK-NEXT:    .cfi_offset lr, 16
 ; CHECK-NEXT:    addis 3, 2, a1@toc@ha
 ; CHECK-NEXT:    lfd 1, a1@toc@l(3)
 ; CHECK-NEXT:    addis 3, 2, a2@toc@ha

diff --git a/test/CodeGen/PowerPC/fp-int128-fp-combine.ll b/test/CodeGen/PowerPC/fp-int128-fp-combine.ll
index 6c9690527321caf38e7d9087f03391e1f071e396..6e37c18dbea73af4a7f3ace9c001f037be07937b 100644 (file)
--- a/test/CodeGen/PowerPC/fp-int128-fp-combine.ll
+++ b/test/CodeGen/PowerPC/fp-int128-fp-combine.ll
@@ -4,14 +4,12 @@
 ; xscvdpsxds should NOT be emitted, since it saturates the result down to i64.
 ; We can't use friz here because it may return -0.0 where the original code doesn't.
 
-define float @f_i128_f(float %v) {
+define float @f_i128_f(float %v) nounwind {
 ; CHECK-LABEL: f_i128_f:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    mflr 0
 ; CHECK-NEXT:    std 0, 16(1)
 ; CHECK-NEXT:    stdu 1, -32(1)
-; CHECK-NEXT:    .cfi_def_cfa_offset 32
-; CHECK-NEXT:    .cfi_offset lr, 16
 ; CHECK-NEXT:    bl __fixsfti
 ; CHECK-NEXT:    nop
 ; CHECK-NEXT:    bl __floattisf

diff --git a/test/CodeGen/PowerPC/jump-tables-collapse-rotate.ll b/test/CodeGen/PowerPC/jump-tables-collapse-rotate.ll
index 1fa49fdbfee39626f4c3cf7ee920aec07e19475d..381e295d4061619f02f5c28f4318669bd5104810 100644 (file)
--- a/test/CodeGen/PowerPC/jump-tables-collapse-rotate.ll
+++ b/test/CodeGen/PowerPC/jump-tables-collapse-rotate.ll
@@ -3,14 +3,12 @@
 ; RUN:   -ppc-asm-full-reg-names -verify-machineinstrs %s | FileCheck %s
 
 ; Function Attrs: nounwind
-define dso_local zeroext i32 @test(i32 signext %l) {
+define dso_local zeroext i32 @test(i32 signext %l) nounwind {
 ; CHECK-LABEL: test:
 ; CHECK:       # %bb.0: # %entry
 ; CHECK-NEXT:    mflr r0
 ; CHECK-NEXT:    std r0, 16(r1)
 ; CHECK-NEXT:    stdu r1, -32(r1)
-; CHECK-NEXT:    .cfi_def_cfa_offset 32
-; CHECK-NEXT:    .cfi_offset lr, 16
 ; CHECK-NEXT:    addi r3, r3, -1
 ; CHECK-NEXT:    cmplwi r3, 5
 ; CHECK-NEXT:    bgt cr0, .LBB0_3

diff --git a/test/CodeGen/PowerPC/machine-pre.ll b/test/CodeGen/PowerPC/machine-pre.ll
index 596c0a4624c4ba48f6a35248d9600187e7668bef..cc6d738bfc707ce9039c393d1d74d657566958de 100644 (file)
--- a/test/CodeGen/PowerPC/machine-pre.ll
+++ b/test/CodeGen/PowerPC/machine-pre.ll
@@ -54,16 +54,10 @@ return:
   ret i32 %ret
 }
 
-define dso_local signext i32 @foo(i32 signext %x, i32 signext %y) local_unnamed_addr #0 {
+define dso_local signext i32 @foo(i32 signext %x, i32 signext %y) nounwind {
 ; CHECK-P9-LABEL: foo:
 ; CHECK-P9:       # %bb.0: # %entry
 ; CHECK-P9-NEXT:    mflr r0
-; CHECK-P9-NEXT:    .cfi_def_cfa_offset 80
-; CHECK-P9-NEXT:    .cfi_offset lr, 16
-; CHECK-P9-NEXT:    .cfi_offset r27, -40
-; CHECK-P9-NEXT:    .cfi_offset r28, -32
-; CHECK-P9-NEXT:    .cfi_offset r29, -24
-; CHECK-P9-NEXT:    .cfi_offset r30, -16
 ; CHECK-P9-NEXT:    std r27, -40(r1) # 8-byte Folded Spill
 ; CHECK-P9-NEXT:    std r28, -32(r1) # 8-byte Folded Spill
 ; CHECK-P9-NEXT:    std r29, -24(r1) # 8-byte Folded Spill

diff --git a/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll b/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll
index 30aff0e32b8dadbf940445192803ebc5131cd797..334dac9fcfccc9b7e995ad1c230dc9794948b158 100644 (file)
--- a/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll
+++ b/test/CodeGen/PowerPC/memCmpUsedInZeroEqualityComparison.ll
@@ -196,14 +196,12 @@ define signext i32 @equalityFoldOneConstant(i8* %X) {
   ret i32 %cond
 }
 
-define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) {
+define i1 @length2_eq_nobuiltin_attr(i8* %X, i8* %Y) nounwind {
 ; CHECK-LABEL: length2_eq_nobuiltin_attr:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    mflr 0
 ; CHECK-NEXT:    std 0, 16(1)
 ; CHECK-NEXT:    stdu 1, -32(1)
-; CHECK-NEXT:    .cfi_def_cfa_offset 32
-; CHECK-NEXT:    .cfi_offset lr, 16
 ; CHECK-NEXT:    li 5, 2
 ; CHECK-NEXT:    bl memcmp
 ; CHECK-NEXT:    nop

diff --git a/test/CodeGen/PowerPC/pr36292.ll b/test/CodeGen/PowerPC/pr36292.ll
index 00d99a703ecfe29162bb4e0623f53d9f0475c4d3..883d26b669088d2c6e59a5cb60deebfac4386cf4 100644 (file)
--- a/test/CodeGen/PowerPC/pr36292.ll
+++ b/test/CodeGen/PowerPC/pr36292.ll
@@ -4,14 +4,10 @@
 $test = comdat any
 
 ; No CTR loop due to frem (since it is always a call).
-define void @test() #0 comdat {
+define void @test() nounwind comdat {
 ; CHECK-LABEL: test:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    mflr 0
-; CHECK-NEXT:    .cfi_def_cfa_offset 64
-; CHECK-NEXT:    .cfi_offset lr, 16
-; CHECK-NEXT:    .cfi_offset r29, -24
-; CHECK-NEXT:    .cfi_offset r30, -16
 ; CHECK-NEXT:    std 29, -24(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std 30, -16(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std 0, 16(1)
@@ -22,7 +18,8 @@ define void @test() #0 comdat {
 ; CHECK-NEXT:    bge- 0, .LBB0_2
 ; CHECK-NEXT:    .p2align 5
 ; CHECK-NEXT:  .LBB0_1: # %bounds.ok
-; CHECK:         lfsx 2, 0, 3
+; CHECK-NEXT:    #
+; CHECK-NEXT:    lfsx 2, 0, 3
 ; CHECK-NEXT:    xxlxor 1, 1, 1
 ; CHECK-NEXT:    bl fmodf
 ; CHECK-NEXT:    nop

diff --git a/test/CodeGen/PowerPC/remove-redundant-load-imm.ll b/test/CodeGen/PowerPC/remove-redundant-load-imm.ll
index 605802fbd2d6ed1a29616e2fa695473c3da2272e..122f9f805b613e575ada7b927d7c075c46e9fc74 100644 (file)
--- a/test/CodeGen/PowerPC/remove-redundant-load-imm.ll
+++ b/test/CodeGen/PowerPC/remove-redundant-load-imm.ll
@@ -9,15 +9,13 @@ target triple = "powerpc64le-unknown-linux-gnu"
 declare void @barney.88(i1, i32*)
 declare void @barney.94(i8*, i32)
 
-define void @redundancy_on_ppc_only(i1 %arg7) {
+define void @redundancy_on_ppc_only(i1 %arg7) nounwind {
 ; PPC64LE-LABEL: redundancy_on_ppc_only:
 ; PPC64LE:       # %bb.0: # %bb
 ; PPC64LE-NEXT:    mflr 0
 ; PPC64LE-NEXT:    andi. 3, 3, 1
 ; PPC64LE-NEXT:    std 0, 16(1)
 ; PPC64LE-NEXT:    stdu 1, -32(1)
-; PPC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PPC64LE-NEXT:    .cfi_offset lr, 16
 ; PPC64LE-NEXT:    li 3, 1
 ; PPC64LE-NEXT:    li 4, 0
 ; PPC64LE-NEXT:    isel 3, 3, 4, 1
@@ -35,14 +33,12 @@ bb10:                                             ; preds = %bb
   ret void
 }
 
-define void @redundancy_on_ppc_and_other_targets() {
+define void @redundancy_on_ppc_and_other_targets() nounwind {
 ; PPC64LE-LABEL: redundancy_on_ppc_and_other_targets:
 ; PPC64LE:       # %bb.0:
 ; PPC64LE-NEXT:    mflr 0
 ; PPC64LE-NEXT:    std 0, 16(1)
 ; PPC64LE-NEXT:    stdu 1, -32(1)
-; PPC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PPC64LE-NEXT:    .cfi_offset lr, 16
 ; PPC64LE-NEXT:    addis 3, 2, .LC0@toc@ha
 ; PPC64LE-NEXT:    ld 3, .LC0@toc@l(3)
 ; PPC64LE-NEXT:    li 4, 0

diff --git a/test/CodeGen/PowerPC/sms-cpy-1.ll b/test/CodeGen/PowerPC/sms-cpy-1.ll
index 04f4ff5a0cd9f799754921debfcf791d7dabb7c8..8fdcd1eac450558dd754079d14443900b22994e5 100644 (file)
--- a/test/CodeGen/PowerPC/sms-cpy-1.ll
+++ b/test/CodeGen/PowerPC/sms-cpy-1.ll
@@ -4,14 +4,12 @@
 
 @.str.28 = external unnamed_addr constant [69 x i8], align 1
 
-define void @print_res() unnamed_addr {
+define void @print_res() nounwind {
 ; CHECK-LABEL: print_res:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    mflr 0
 ; CHECK-NEXT:    std 0, 16(1)
 ; CHECK-NEXT:    stdu 1, -128(1)
-; CHECK-NEXT:    .cfi_def_cfa_offset 128
-; CHECK-NEXT:    .cfi_offset lr, 16
 ; CHECK-NEXT:    lwz 3, 0(3)
 ; CHECK-NEXT:    addi 3, 3, -1
 ; CHECK-NEXT:    clrldi 4, 3, 32

diff --git a/test/CodeGen/PowerPC/sms-phi-1.ll b/test/CodeGen/PowerPC/sms-phi-1.ll
index e915b7c2c45623851363407ecc7564da7323d900..436c3b41325660b8b4a1bc86c53762dd0d9a0b9a 100644 (file)
--- a/test/CodeGen/PowerPC/sms-phi-1.ll
+++ b/test/CodeGen/PowerPC/sms-phi-1.ll
@@ -2,13 +2,10 @@
 ; RUN: llc < %s -mtriple=powerpc64le-unknown-linux-gnu -verify-machineinstrs\
 ; RUN:       -mcpu=pwr9 --ppc-enable-pipeliner 2>&1 | FileCheck %s
 
-define void @main() local_unnamed_addr #0 {
+define void @main() nounwind #0 {
 ; CHECK-LABEL: main:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    mflr 0
-; CHECK-NEXT:    .cfi_def_cfa_offset 48
-; CHECK-NEXT:    .cfi_offset lr, 16
-; CHECK-NEXT:    .cfi_offset r30, -16
 ; CHECK-NEXT:    std 30, -16(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std 0, 16(1)
 ; CHECK-NEXT:    stdu 1, -48(1)

diff --git a/test/CodeGen/PowerPC/sms-phi-3.ll b/test/CodeGen/PowerPC/sms-phi-3.ll
index 44289f37103ef17afc38b5c0e249e04ac28419ea..12a44f9226636711aed6da276a652cb6c6f13823 100644 (file)
--- a/test/CodeGen/PowerPC/sms-phi-3.ll
+++ b/test/CodeGen/PowerPC/sms-phi-3.ll
@@ -5,14 +5,10 @@
 %0 = type { double, double, double, i32, i32 }
 declare i8* @malloc() local_unnamed_addr
 
-define void @phi3(i32*) local_unnamed_addr {
+define void @phi3(i32*) nounwind {
 ; CHECK-LABEL: phi3:
 ; CHECK:       # %bb.0:
 ; CHECK-NEXT:    mflr 0
-; CHECK-NEXT:    .cfi_def_cfa_offset 64
-; CHECK-NEXT:    .cfi_offset lr, 16
-; CHECK-NEXT:    .cfi_offset r29, -24
-; CHECK-NEXT:    .cfi_offset r30, -16
 ; CHECK-NEXT:    std 29, -24(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std 30, -16(1) # 8-byte Folded Spill
 ; CHECK-NEXT:    std 0, 16(1)

diff --git a/test/CodeGen/PowerPC/testComparesi32gtu.ll b/test/CodeGen/PowerPC/testComparesi32gtu.ll
index 2f2a32a731319db0a00f7e28b5f2a63f45579f60..855e175c6e90e6a3f7a4349cef2c3336e1adb27f 100644 (file)
--- a/test/CodeGen/PowerPC/testComparesi32gtu.ll
+++ b/test/CodeGen/PowerPC/testComparesi32gtu.ll
@@ -12,14 +12,12 @@
 declare signext i32 @fn2(...) local_unnamed_addr #1
 
 ; Function Attrs: nounwind
-define i32 @testCompare1(%struct.tree_common* nocapture readonly %arg1) {
+define i32 @testCompare1(%struct.tree_common* nocapture readonly %arg1) nounwind {
 ; BE-LABEL: testCompare1:
 ; BE:       # %bb.0: # %entry
 ; BE-NEXT:    mflr r0
 ; BE-NEXT:    std r0, 16(r1)
 ; BE-NEXT:    stdu r1, -112(r1)
-; BE-NEXT:    .cfi_def_cfa_offset 112
-; BE-NEXT:    .cfi_offset lr, 16
 ; BE-NEXT:    addis r4, r2, .LC0@toc@ha
 ; BE-NEXT:    lbz r3, 0(r3)
 ; BE-NEXT:    ld r4, .LC0@toc@l(r4)
@@ -42,8 +40,6 @@ define i32 @testCompare1(%struct.tree_common* nocapture readonly %arg1) {
 ; LE-NEXT:    mflr r0
 ; LE-NEXT:    std r0, 16(r1)
 ; LE-NEXT:    stdu r1, -32(r1)
-; LE-NEXT:    .cfi_def_cfa_offset 32
-; LE-NEXT:    .cfi_offset lr, 16
 ; LE-NEXT:    addis r4, r2, .LC0@toc@ha
 ; LE-NEXT:    lbz r3, 0(r3)
 ; LE-NEXT:    ld r4, .LC0@toc@l(r4)

diff --git a/test/CodeGen/PowerPC/testComparesi32ltu.ll b/test/CodeGen/PowerPC/testComparesi32ltu.ll
index 5c228853c5aaa72332439fe447c08cc49111b5eb..0c399ff42b956b09d59d5e3f159d88bb329f3e8c 100644 (file)
--- a/test/CodeGen/PowerPC/testComparesi32ltu.ll
+++ b/test/CodeGen/PowerPC/testComparesi32ltu.ll
@@ -12,14 +12,12 @@
 declare signext i32 @fn2(...) local_unnamed_addr #1
 
 ; Function Attrs: nounwind
-define i32 @testCompare1(%struct.tree_common* nocapture readonly %arg1) {
+define i32 @testCompare1(%struct.tree_common* nocapture readonly %arg1) nounwind {
 ; BE-LABEL: testCompare1:
 ; BE:       # %bb.0: # %entry
 ; BE-NEXT:    mflr r0
 ; BE-NEXT:    std r0, 16(r1)
 ; BE-NEXT:    stdu r1, -112(r1)
-; BE-NEXT:    .cfi_def_cfa_offset 112
-; BE-NEXT:    .cfi_offset lr, 16
 ; BE-NEXT:    addis r4, r2, .LC0@toc@ha
 ; BE-NEXT:    lbz r3, 0(r3)
 ; BE-NEXT:    ld r4, .LC0@toc@l(r4)
@@ -42,8 +40,6 @@ define i32 @testCompare1(%struct.tree_common* nocapture readonly %arg1) {
 ; LE-NEXT:    mflr r0
 ; LE-NEXT:    std r0, 16(r1)
 ; LE-NEXT:    stdu r1, -32(r1)
-; LE-NEXT:    .cfi_def_cfa_offset 32
-; LE-NEXT:    .cfi_offset lr, 16
 ; LE-NEXT:    addis r4, r2, .LC0@toc@ha
 ; LE-NEXT:    lbz r3, 0(r3)
 ; LE-NEXT:    ld r4, .LC0@toc@l(r4)

diff --git a/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll b/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll
index b3c9012b6e0032a550e18c29f223973a66606393..9172bd02ec3001399efb198180bc853d76a342aa 100644 (file)
--- a/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll
+++ b/test/CodeGen/PowerPC/umulo-128-legalisation-lowering.ll
@@ -38,19 +38,6 @@ define { i128, i8 } @muloti_test(i128 %l, i128 %r) unnamed_addr #0 {
 ; PPC32-NEXT:    mflr 0
 ; PPC32-NEXT:    stw 0, 4(1)
 ; PPC32-NEXT:    stwu 1, -80(1)
-; PPC32-NEXT:    .cfi_def_cfa_offset 80
-; PPC32-NEXT:    .cfi_offset lr, 4
-; PPC32-NEXT:    .cfi_offset r20, -48
-; PPC32-NEXT:    .cfi_offset r21, -44
-; PPC32-NEXT:    .cfi_offset r22, -40
-; PPC32-NEXT:    .cfi_offset r23, -36
-; PPC32-NEXT:    .cfi_offset r24, -32
-; PPC32-NEXT:    .cfi_offset r25, -28
-; PPC32-NEXT:    .cfi_offset r26, -24
-; PPC32-NEXT:    .cfi_offset r27, -20
-; PPC32-NEXT:    .cfi_offset r28, -16
-; PPC32-NEXT:    .cfi_offset r29, -12
-; PPC32-NEXT:    .cfi_offset r30, -8
 ; PPC32-NEXT:    stw 26, 56(1) # 4-byte Folded Spill
 ; PPC32-NEXT:    stw 27, 60(1) # 4-byte Folded Spill
 ; PPC32-NEXT:    stw 29, 68(1) # 4-byte Folded Spill
@@ -178,6 +165,6 @@ start:
 ; Function Attrs: nounwind readnone speculatable
 declare { i128, i1 } @llvm.umul.with.overflow.i128(i128, i128) #1
 
-attributes #0 = { nounwind readnone uwtable }
+attributes #0 = { nounwind readnone }
 attributes #1 = { nounwind readnone speculatable }
 attributes #2 = { nounwind }

diff --git a/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll b/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
index 0df915a19ccb78a87637ff95b9d0a0b1e380fadf..ac939583f8ff143178bd7058efbbe1fa18350c80 100644 (file)
--- a/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
+++ b/test/CodeGen/PowerPC/vector-constrained-fp-intrinsics.ll
@@ -2,7 +2,7 @@
 ; RUN: llc -O3 -mtriple=powerpc64le-linux-gnu < %s | FileCheck --check-prefix=PC64LE %s
 ; RUN: llc -O3 -mtriple=powerpc64le-linux-gnu -mcpu=pwr9 < %s | FileCheck --check-prefix=PC64LE9 %s
 
-define <1 x float> @constrained_vector_fdiv_v1f32() {
+define <1 x float> @constrained_vector_fdiv_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_fdiv_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI0_0@toc@ha
@@ -33,7 +33,7 @@ entry:
   ret <1 x float> %div
 }
 
-define <2 x double> @constrained_vector_fdiv_v2f64() {
+define <2 x double> @constrained_vector_fdiv_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_fdiv_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI1_0@toc@ha
@@ -66,7 +66,7 @@ entry:
   ret <2 x double> %div
 }
 
-define <3 x float> @constrained_vector_fdiv_v3f32() {
+define <3 x float> @constrained_vector_fdiv_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_fdiv_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI2_0@toc@ha
@@ -127,7 +127,7 @@ entry:
   ret <3 x float> %div
 }
 
-define <3 x double> @constrained_vector_fdiv_v3f64() {
+define <3 x double> @constrained_vector_fdiv_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_fdiv_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI3_2@toc@ha
@@ -176,7 +176,7 @@ entry:
   ret <3 x double> %div
 }
 
-define <4 x double> @constrained_vector_fdiv_v4f64() {
+define <4 x double> @constrained_vector_fdiv_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_fdiv_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI4_0@toc@ha
@@ -220,14 +220,12 @@ entry:
   ret <4 x double> %div
 }
 
-define <1 x float> @constrained_vector_frem_v1f32() {
+define <1 x float> @constrained_vector_frem_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_frem_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -32(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI5_0@toc@ha
 ; PC64LE-NEXT:    addis 4, 2, .LCPI5_1@toc@ha
 ; PC64LE-NEXT:    lfs 1, .LCPI5_0@toc@l(3)
@@ -246,8 +244,6 @@ define <1 x float> @constrained_vector_frem_v1f32() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -32(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI5_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI5_0@toc@l(3)
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI5_1@toc@ha
@@ -269,13 +265,10 @@ entry:
   ret <1 x float> %rem
 }
 
-define <2 x double> @constrained_vector_frem_v2f64() {
+define <2 x double> @constrained_vector_frem_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_frem_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f31, -8
 ; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
@@ -307,9 +300,6 @@ define <2 x double> @constrained_vector_frem_v2f64() {
 ; PC64LE9-LABEL: constrained_vector_frem_v2f64:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    mflr 0
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
 ; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
@@ -344,15 +334,10 @@ entry:
   ret <2 x double> %rem
 }
 
-define <3 x float> @constrained_vector_frem_v3f32() {
+define <3 x float> @constrained_vector_frem_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_frem_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
-; PC64LE-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f29, -24
-; PC64LE-NEXT:    .cfi_offset f30, -16
-; PC64LE-NEXT:    .cfi_offset f31, -8
 ; PC64LE-NEXT:    stfd 29, -24(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
@@ -399,11 +384,6 @@ define <3 x float> @constrained_vector_frem_v3f32() {
 ; PC64LE9-LABEL: constrained_vector_frem_v3f32:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    mflr 0
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f29, -24
-; PC64LE9-NEXT:    .cfi_offset f30, -16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
 ; PC64LE9-NEXT:    stfd 29, -24(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
@@ -455,16 +435,12 @@ entry:
   ret <3 x float> %rem
 }
 
-define <3 x double> @constrained_vector_frem_v3f64() {
+define <3 x double> @constrained_vector_frem_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_frem_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -96(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 96
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f31, -8
-; PC64LE-NEXT:    .cfi_offset v31, -32
 ; PC64LE-NEXT:    addis 4, 2, .LCPI8_1@toc@ha
 ; PC64LE-NEXT:    stfd 31, 88(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    li 3, 64
@@ -508,10 +484,6 @@ define <3 x double> @constrained_vector_frem_v3f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -80(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
-; PC64LE9-NEXT:    .cfi_offset v31, -32
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI8_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI8_0@toc@l(3)
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI8_1@toc@ha
@@ -554,16 +526,12 @@ entry:
   ret <3 x double> %rem
 }
 
-define <4 x double> @constrained_vector_frem_v4f64() {
+define <4 x double> @constrained_vector_frem_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_frem_v4f64:
 ; PC64LE:       # %bb.0:
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -96(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 96
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f31, -8
-; PC64LE-NEXT:    .cfi_offset v31, -32
 ; PC64LE-NEXT:    addis 4, 2, .LCPI9_1@toc@ha
 ; PC64LE-NEXT:    stfd 31, 88(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    li 3, 64
@@ -617,10 +585,6 @@ define <4 x double> @constrained_vector_frem_v4f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -80(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
-; PC64LE9-NEXT:    .cfi_offset v31, -32
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI9_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI9_0@toc@l(3)
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI9_1@toc@ha
@@ -672,7 +636,7 @@ define <4 x double> @constrained_vector_frem_v4f64() {
   ret <4 x double> %rem
 }
 
-define <1 x float> @constrained_vector_fmul_v1f32() {
+define <1 x float> @constrained_vector_fmul_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_fmul_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI10_0@toc@ha
@@ -703,7 +667,7 @@ entry:
   ret <1 x float> %mul
 }
 
-define <2 x double> @constrained_vector_fmul_v2f64() {
+define <2 x double> @constrained_vector_fmul_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_fmul_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI11_0@toc@ha
@@ -736,7 +700,7 @@ entry:
   ret <2 x double> %mul
 }
 
-define <3 x float> @constrained_vector_fmul_v3f32() {
+define <3 x float> @constrained_vector_fmul_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_fmul_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI12_1@toc@ha
@@ -798,7 +762,7 @@ entry:
   ret <3 x float> %mul
 }
 
-define <3 x double> @constrained_vector_fmul_v3f64() {
+define <3 x double> @constrained_vector_fmul_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_fmul_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI13_2@toc@ha
@@ -848,7 +812,7 @@ entry:
   ret <3 x double> %mul
 }
 
-define <4 x double> @constrained_vector_fmul_v4f64() {
+define <4 x double> @constrained_vector_fmul_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_fmul_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI14_0@toc@ha
@@ -892,7 +856,7 @@ entry:
   ret <4 x double> %mul
 }
 
-define <1 x float> @constrained_vector_fadd_v1f32() {
+define <1 x float> @constrained_vector_fadd_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_fadd_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI15_0@toc@ha
@@ -923,7 +887,7 @@ entry:
   ret <1 x float> %add
 }
 
-define <2 x double> @constrained_vector_fadd_v2f64() {
+define <2 x double> @constrained_vector_fadd_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_fadd_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI16_0@toc@ha
@@ -956,7 +920,7 @@ entry:
   ret <2 x double> %add
 }
 
-define <3 x float> @constrained_vector_fadd_v3f32() {
+define <3 x float> @constrained_vector_fadd_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_fadd_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI17_0@toc@ha
@@ -1016,7 +980,7 @@ entry:
   ret <3 x float> %add
 }
 
-define <3 x double> @constrained_vector_fadd_v3f64() {
+define <3 x double> @constrained_vector_fadd_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_fadd_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI18_1@toc@ha
@@ -1064,7 +1028,7 @@ entry:
   ret <3 x double> %add
 }
 
-define <4 x double> @constrained_vector_fadd_v4f64() {
+define <4 x double> @constrained_vector_fadd_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_fadd_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI19_0@toc@ha
@@ -1108,7 +1072,7 @@ entry:
   ret <4 x double> %add
 }
 
-define <1 x float> @constrained_vector_fsub_v1f32() {
+define <1 x float> @constrained_vector_fsub_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_fsub_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI20_0@toc@ha
@@ -1139,7 +1103,7 @@ entry:
   ret <1 x float> %sub
 }
 
-define <2 x double> @constrained_vector_fsub_v2f64() {
+define <2 x double> @constrained_vector_fsub_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_fsub_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI21_0@toc@ha
@@ -1172,7 +1136,7 @@ entry:
   ret <2 x double> %sub
 }
 
-define <3 x float> @constrained_vector_fsub_v3f32() {
+define <3 x float> @constrained_vector_fsub_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_fsub_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI22_0@toc@ha
@@ -1232,7 +1196,7 @@ entry:
   ret <3 x float> %sub
 }
 
-define <3 x double> @constrained_vector_fsub_v3f64() {
+define <3 x double> @constrained_vector_fsub_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_fsub_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI23_1@toc@ha
@@ -1280,7 +1244,7 @@ entry:
   ret <3 x double> %sub
 }
 
-define <4 x double> @constrained_vector_fsub_v4f64() {
+define <4 x double> @constrained_vector_fsub_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_fsub_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI24_0@toc@ha
@@ -1324,7 +1288,7 @@ entry:
   ret <4 x double> %sub
 }
 
-define <1 x float> @constrained_vector_sqrt_v1f32() {
+define <1 x float> @constrained_vector_sqrt_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_sqrt_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI25_0@toc@ha
@@ -1350,7 +1314,7 @@ entry:
   ret <1 x float> %sqrt
 }
 
-define <2 x double> @constrained_vector_sqrt_v2f64() {
+define <2 x double> @constrained_vector_sqrt_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_sqrt_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI26_0@toc@ha
@@ -1375,7 +1339,7 @@ entry:
   ret <2 x double> %sqrt
 }
 
-define <3 x float> @constrained_vector_sqrt_v3f32() {
+define <3 x float> @constrained_vector_sqrt_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_sqrt_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI27_2@toc@ha
@@ -1431,7 +1395,7 @@ entry:
   ret <3 x float> %sqrt
 }
 
-define <3 x double> @constrained_vector_sqrt_v3f64() {
+define <3 x double> @constrained_vector_sqrt_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_sqrt_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI28_1@toc@ha
@@ -1468,7 +1432,7 @@ entry:
   ret <3 x double> %sqrt
 }
 
-define <4 x double> @constrained_vector_sqrt_v4f64() {
+define <4 x double> @constrained_vector_sqrt_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_sqrt_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI29_0@toc@ha
@@ -1503,14 +1467,12 @@ define <4 x double> @constrained_vector_sqrt_v4f64() {
   ret <4 x double> %sqrt
 }
 
-define <1 x float> @constrained_vector_pow_v1f32() {
+define <1 x float> @constrained_vector_pow_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_pow_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -32(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI30_0@toc@ha
 ; PC64LE-NEXT:    addis 4, 2, .LCPI30_1@toc@ha
 ; PC64LE-NEXT:    lfs 1, .LCPI30_0@toc@l(3)
@@ -1529,8 +1491,6 @@ define <1 x float> @constrained_vector_pow_v1f32() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -32(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI30_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI30_0@toc@l(3)
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI30_1@toc@ha
@@ -1552,13 +1512,10 @@ entry:
   ret <1 x float> %pow
 }
 
-define <2 x double> @constrained_vector_pow_v2f64() {
+define <2 x double> @constrained_vector_pow_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_pow_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f31, -8
 ; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
@@ -1590,9 +1547,6 @@ define <2 x double> @constrained_vector_pow_v2f64() {
 ; PC64LE9-LABEL: constrained_vector_pow_v2f64:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    mflr 0
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
 ; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
@@ -1627,15 +1581,10 @@ entry:
   ret <2 x double> %pow
 }
 
-define <3 x float> @constrained_vector_pow_v3f32() {
+define <3 x float> @constrained_vector_pow_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_pow_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
-; PC64LE-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f29, -24
-; PC64LE-NEXT:    .cfi_offset f30, -16
-; PC64LE-NEXT:    .cfi_offset f31, -8
 ; PC64LE-NEXT:    stfd 29, -24(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
@@ -1682,11 +1631,6 @@ define <3 x float> @constrained_vector_pow_v3f32() {
 ; PC64LE9-LABEL: constrained_vector_pow_v3f32:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    mflr 0
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f29, -24
-; PC64LE9-NEXT:    .cfi_offset f30, -16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
 ; PC64LE9-NEXT:    stfd 29, -24(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
@@ -1738,16 +1682,12 @@ entry:
   ret <3 x float> %pow
 }
 
-define <3 x double> @constrained_vector_pow_v3f64() {
+define <3 x double> @constrained_vector_pow_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_pow_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -96(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 96
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f31, -8
-; PC64LE-NEXT:    .cfi_offset v31, -32
 ; PC64LE-NEXT:    addis 4, 2, .LCPI33_1@toc@ha
 ; PC64LE-NEXT:    stfd 31, 88(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    li 3, 64
@@ -1791,10 +1731,6 @@ define <3 x double> @constrained_vector_pow_v3f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -80(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
-; PC64LE9-NEXT:    .cfi_offset v31, -32
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI33_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI33_0@toc@l(3)
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI33_1@toc@ha
@@ -1837,16 +1773,12 @@ entry:
   ret <3 x double> %pow
 }
 
-define <4 x double> @constrained_vector_pow_v4f64() {
+define <4 x double> @constrained_vector_pow_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_pow_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -96(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 96
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f31, -8
-; PC64LE-NEXT:    .cfi_offset v31, -32
 ; PC64LE-NEXT:    addis 4, 2, .LCPI34_1@toc@ha
 ; PC64LE-NEXT:    stfd 31, 88(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    li 3, 64
@@ -1900,10 +1832,6 @@ define <4 x double> @constrained_vector_pow_v4f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -80(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
-; PC64LE9-NEXT:    .cfi_offset v31, -32
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI34_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI34_0@toc@l(3)
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI34_1@toc@ha
@@ -1956,14 +1884,12 @@ entry:
   ret <4 x double> %pow
 }
 
-define <1 x float> @constrained_vector_powi_v1f32() {
+define <1 x float> @constrained_vector_powi_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_powi_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -32(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI35_0@toc@ha
 ; PC64LE-NEXT:    li 4, 3
 ; PC64LE-NEXT:    lfs 1, .LCPI35_0@toc@l(3)
@@ -1981,8 +1907,6 @@ define <1 x float> @constrained_vector_powi_v1f32() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -32(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI35_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI35_0@toc@l(3)
 ; PC64LE9-NEXT:    li 4, 3
@@ -2003,14 +1927,12 @@ entry:
   ret <1 x float> %powi
 }
 
-define <2 x double> @constrained_vector_powi_v2f64() {
+define <2 x double> @constrained_vector_powi_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_powi_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -64(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI36_0@toc@ha
 ; PC64LE-NEXT:    li 4, 3
 ; PC64LE-NEXT:    lfd 1, .LCPI36_0@toc@l(3)
@@ -2038,8 +1960,6 @@ define <2 x double> @constrained_vector_powi_v2f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -48(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI36_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI36_0@toc@l(3)
 ; PC64LE9-NEXT:    li 4, 3
@@ -2068,16 +1988,12 @@ entry:
   ret <2 x double> %powi
 }
 
-define <3 x float> @constrained_vector_powi_v3f32() {
+define <3 x float> @constrained_vector_powi_v3f32() nounwind {
 ;
 ;
 ; PC64LE-LABEL: constrained_vector_powi_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
-; PC64LE-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f30, -16
-; PC64LE-NEXT:    .cfi_offset f31, -8
 ; PC64LE-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    std 0, 16(1)
@@ -2120,10 +2036,6 @@ define <3 x float> @constrained_vector_powi_v3f32() {
 ; PC64LE9-LABEL: constrained_vector_powi_v3f32:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    mflr 0
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f30, -16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
 ; PC64LE9-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    std 0, 16(1)
@@ -2171,15 +2083,12 @@ entry:
   ret <3 x float> %powi
 }
 
-define <3 x double> @constrained_vector_powi_v3f64() {
+define <3 x double> @constrained_vector_powi_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_powi_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    li 4, 3
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
@@ -2219,9 +2128,6 @@ define <3 x double> @constrained_vector_powi_v3f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI38_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI38_0@toc@l(3)
 ; PC64LE9-NEXT:    li 4, 3
@@ -2260,15 +2166,12 @@ entry:
   ret <3 x double> %powi
 }
 
-define <4 x double> @constrained_vector_powi_v4f64() {
+define <4 x double> @constrained_vector_powi_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_powi_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    li 4, 3
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
@@ -2318,9 +2221,6 @@ define <4 x double> @constrained_vector_powi_v4f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI39_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI39_0@toc@l(3)
 ; PC64LE9-NEXT:    li 4, 3
@@ -2368,14 +2268,12 @@ entry:
   ret <4 x double> %powi
 }
 
-define <1 x float> @constrained_vector_sin_v1f32() {
+define <1 x float> @constrained_vector_sin_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_sin_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -32(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI40_0@toc@ha
 ; PC64LE-NEXT:    lfs 1, .LCPI40_0@toc@l(3)
 ; PC64LE-NEXT:    bl sinf
@@ -2392,8 +2290,6 @@ define <1 x float> @constrained_vector_sin_v1f32() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -32(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI40_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI40_0@toc@l(3)
 ; PC64LE9-NEXT:    bl sinf
@@ -2412,14 +2308,12 @@ entry:
   ret <1 x float> %sin
 }
 
-define <2 x double> @constrained_vector_sin_v2f64() {
+define <2 x double> @constrained_vector_sin_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_sin_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -64(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI41_0@toc@ha
 ; PC64LE-NEXT:    lfd 1, .LCPI41_0@toc@l(3)
 ; PC64LE-NEXT:    bl sin
@@ -2445,8 +2339,6 @@ define <2 x double> @constrained_vector_sin_v2f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -48(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI41_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI41_0@toc@l(3)
 ; PC64LE9-NEXT:    bl sin
@@ -2472,14 +2364,10 @@ entry:
   ret <2 x double> %sin
 }
 
-define <3 x float> @constrained_vector_sin_v3f32() {
+define <3 x float> @constrained_vector_sin_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_sin_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
-; PC64LE-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f30, -16
-; PC64LE-NEXT:    .cfi_offset f31, -8
 ; PC64LE-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    std 0, 16(1)
@@ -2519,10 +2407,6 @@ define <3 x float> @constrained_vector_sin_v3f32() {
 ; PC64LE9-LABEL: constrained_vector_sin_v3f32:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    mflr 0
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f30, -16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
 ; PC64LE9-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    std 0, 16(1)
@@ -2566,15 +2450,12 @@ entry:
   ret <3 x float> %sin
 }
 
-define <3 x double> @constrained_vector_sin_v3f64() {
+define <3 x double> @constrained_vector_sin_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_sin_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI43_0@toc@ha
@@ -2611,9 +2492,6 @@ define <3 x double> @constrained_vector_sin_v3f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI43_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI43_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -2648,15 +2526,12 @@ entry:
   ret <3 x double> %sin
 }
 
-define <4 x double> @constrained_vector_sin_v4f64() {
+define <4 x double> @constrained_vector_sin_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_sin_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI44_0@toc@ha
@@ -2702,9 +2577,6 @@ define <4 x double> @constrained_vector_sin_v4f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI44_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI44_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -2747,14 +2619,12 @@ entry:
   ret <4 x double> %sin
 }
 
-define <1 x float> @constrained_vector_cos_v1f32() {
+define <1 x float> @constrained_vector_cos_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_cos_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -32(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI45_0@toc@ha
 ; PC64LE-NEXT:    lfs 1, .LCPI45_0@toc@l(3)
 ; PC64LE-NEXT:    bl cosf
@@ -2771,8 +2641,6 @@ define <1 x float> @constrained_vector_cos_v1f32() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -32(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI45_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI45_0@toc@l(3)
 ; PC64LE9-NEXT:    bl cosf
@@ -2791,14 +2659,12 @@ entry:
   ret <1 x float> %cos
 }
 
-define <2 x double> @constrained_vector_cos_v2f64() {
+define <2 x double> @constrained_vector_cos_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_cos_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -64(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI46_0@toc@ha
 ; PC64LE-NEXT:    lfd 1, .LCPI46_0@toc@l(3)
 ; PC64LE-NEXT:    bl cos
@@ -2824,8 +2690,6 @@ define <2 x double> @constrained_vector_cos_v2f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -48(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI46_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI46_0@toc@l(3)
 ; PC64LE9-NEXT:    bl cos
@@ -2851,14 +2715,10 @@ entry:
   ret <2 x double> %cos
 }
 
-define <3 x float> @constrained_vector_cos_v3f32() {
+define <3 x float> @constrained_vector_cos_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_cos_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
-; PC64LE-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f30, -16
-; PC64LE-NEXT:    .cfi_offset f31, -8
 ; PC64LE-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    std 0, 16(1)
@@ -2898,10 +2758,6 @@ define <3 x float> @constrained_vector_cos_v3f32() {
 ; PC64LE9-LABEL: constrained_vector_cos_v3f32:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    mflr 0
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f30, -16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
 ; PC64LE9-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    std 0, 16(1)
@@ -2945,15 +2801,12 @@ entry:
   ret <3 x float> %cos
 }
 
-define <3 x double> @constrained_vector_cos_v3f64() {
+define <3 x double> @constrained_vector_cos_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_cos_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI48_0@toc@ha
@@ -2990,9 +2843,6 @@ define <3 x double> @constrained_vector_cos_v3f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI48_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI48_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -3027,15 +2877,12 @@ entry:
   ret <3 x double> %cos
 }
 
-define <4 x double> @constrained_vector_cos_v4f64() {
+define <4 x double> @constrained_vector_cos_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_cos_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI49_0@toc@ha
@@ -3081,9 +2928,6 @@ define <4 x double> @constrained_vector_cos_v4f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI49_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI49_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -3126,14 +2970,12 @@ entry:
   ret <4 x double> %cos
 }
 
-define <1 x float> @constrained_vector_exp_v1f32() {
+define <1 x float> @constrained_vector_exp_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_exp_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -32(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI50_0@toc@ha
 ; PC64LE-NEXT:    lfs 1, .LCPI50_0@toc@l(3)
 ; PC64LE-NEXT:    bl expf
@@ -3150,8 +2992,6 @@ define <1 x float> @constrained_vector_exp_v1f32() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -32(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI50_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI50_0@toc@l(3)
 ; PC64LE9-NEXT:    bl expf
@@ -3170,14 +3010,12 @@ entry:
   ret <1 x float> %exp
 }
 
-define <2 x double> @constrained_vector_exp_v2f64() {
+define <2 x double> @constrained_vector_exp_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_exp_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -64(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI51_0@toc@ha
 ; PC64LE-NEXT:    lfd 1, .LCPI51_0@toc@l(3)
 ; PC64LE-NEXT:    bl exp
@@ -3203,8 +3041,6 @@ define <2 x double> @constrained_vector_exp_v2f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -48(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI51_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI51_0@toc@l(3)
 ; PC64LE9-NEXT:    bl exp
@@ -3230,14 +3066,10 @@ entry:
   ret <2 x double> %exp
 }
 
-define <3 x float> @constrained_vector_exp_v3f32() {
+define <3 x float> @constrained_vector_exp_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_exp_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
-; PC64LE-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f30, -16
-; PC64LE-NEXT:    .cfi_offset f31, -8
 ; PC64LE-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    std 0, 16(1)
@@ -3277,10 +3109,6 @@ define <3 x float> @constrained_vector_exp_v3f32() {
 ; PC64LE9-LABEL: constrained_vector_exp_v3f32:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    mflr 0
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f30, -16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
 ; PC64LE9-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    std 0, 16(1)
@@ -3324,15 +3152,12 @@ entry:
   ret <3 x float> %exp
 }
 
-define <3 x double> @constrained_vector_exp_v3f64() {
+define <3 x double> @constrained_vector_exp_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_exp_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI53_0@toc@ha
@@ -3369,9 +3194,6 @@ define <3 x double> @constrained_vector_exp_v3f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI53_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI53_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -3406,15 +3228,12 @@ entry:
   ret <3 x double> %exp
 }
 
-define <4 x double> @constrained_vector_exp_v4f64() {
+define <4 x double> @constrained_vector_exp_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_exp_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI54_0@toc@ha
@@ -3460,9 +3279,6 @@ define <4 x double> @constrained_vector_exp_v4f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI54_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI54_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -3505,14 +3321,12 @@ entry:
   ret <4 x double> %exp
 }
 
-define <1 x float> @constrained_vector_exp2_v1f32() {
+define <1 x float> @constrained_vector_exp2_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_exp2_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -32(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI55_0@toc@ha
 ; PC64LE-NEXT:    lfs 1, .LCPI55_0@toc@l(3)
 ; PC64LE-NEXT:    bl exp2f
@@ -3529,8 +3343,6 @@ define <1 x float> @constrained_vector_exp2_v1f32() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -32(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI55_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI55_0@toc@l(3)
 ; PC64LE9-NEXT:    bl exp2f
@@ -3549,14 +3361,12 @@ entry:
   ret <1 x float> %exp2
 }
 
-define <2 x double> @constrained_vector_exp2_v2f64() {
+define <2 x double> @constrained_vector_exp2_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_exp2_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -64(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI56_0@toc@ha
 ; PC64LE-NEXT:    lfd 1, .LCPI56_0@toc@l(3)
 ; PC64LE-NEXT:    bl exp2
@@ -3582,8 +3392,6 @@ define <2 x double> @constrained_vector_exp2_v2f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -48(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI56_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI56_0@toc@l(3)
 ; PC64LE9-NEXT:    bl exp2
@@ -3609,14 +3417,10 @@ entry:
   ret <2 x double> %exp2
 }
 
-define <3 x float> @constrained_vector_exp2_v3f32() {
+define <3 x float> @constrained_vector_exp2_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_exp2_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
-; PC64LE-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f30, -16
-; PC64LE-NEXT:    .cfi_offset f31, -8
 ; PC64LE-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    std 0, 16(1)
@@ -3656,10 +3460,6 @@ define <3 x float> @constrained_vector_exp2_v3f32() {
 ; PC64LE9-LABEL: constrained_vector_exp2_v3f32:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    mflr 0
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f30, -16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
 ; PC64LE9-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    std 0, 16(1)
@@ -3703,15 +3503,12 @@ entry:
   ret <3 x float> %exp2
 }
 
-define <3 x double> @constrained_vector_exp2_v3f64() {
+define <3 x double> @constrained_vector_exp2_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_exp2_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI58_0@toc@ha
@@ -3748,9 +3545,6 @@ define <3 x double> @constrained_vector_exp2_v3f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI58_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI58_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -3785,15 +3579,12 @@ entry:
   ret <3 x double> %exp2
 }
 
-define <4 x double> @constrained_vector_exp2_v4f64() {
+define <4 x double> @constrained_vector_exp2_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_exp2_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI59_0@toc@ha
@@ -3839,9 +3630,6 @@ define <4 x double> @constrained_vector_exp2_v4f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI59_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI59_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -3884,14 +3672,12 @@ entry:
   ret <4 x double> %exp2
 }
 
-define <1 x float> @constrained_vector_log_v1f32() {
+define <1 x float> @constrained_vector_log_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_log_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -32(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI60_0@toc@ha
 ; PC64LE-NEXT:    lfs 1, .LCPI60_0@toc@l(3)
 ; PC64LE-NEXT:    bl logf
@@ -3908,8 +3694,6 @@ define <1 x float> @constrained_vector_log_v1f32() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -32(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI60_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI60_0@toc@l(3)
 ; PC64LE9-NEXT:    bl logf
@@ -3928,14 +3712,12 @@ entry:
   ret <1 x float> %log
 }
 
-define <2 x double> @constrained_vector_log_v2f64() {
+define <2 x double> @constrained_vector_log_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_log_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -64(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI61_0@toc@ha
 ; PC64LE-NEXT:    lfd 1, .LCPI61_0@toc@l(3)
 ; PC64LE-NEXT:    bl log
@@ -3961,8 +3743,6 @@ define <2 x double> @constrained_vector_log_v2f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -48(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI61_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI61_0@toc@l(3)
 ; PC64LE9-NEXT:    bl log
@@ -3988,14 +3768,10 @@ entry:
   ret <2 x double> %log
 }
 
-define <3 x float> @constrained_vector_log_v3f32() {
+define <3 x float> @constrained_vector_log_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_log_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
-; PC64LE-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f30, -16
-; PC64LE-NEXT:    .cfi_offset f31, -8
 ; PC64LE-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    std 0, 16(1)
@@ -4035,10 +3811,6 @@ define <3 x float> @constrained_vector_log_v3f32() {
 ; PC64LE9-LABEL: constrained_vector_log_v3f32:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    mflr 0
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f30, -16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
 ; PC64LE9-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    std 0, 16(1)
@@ -4082,15 +3854,12 @@ entry:
   ret <3 x float> %log
 }
 
-define <3 x double> @constrained_vector_log_v3f64() {
+define <3 x double> @constrained_vector_log_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_log_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI63_0@toc@ha
@@ -4127,9 +3896,6 @@ define <3 x double> @constrained_vector_log_v3f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI63_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI63_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -4164,15 +3930,12 @@ entry:
   ret <3 x double> %log
 }
 
-define <4 x double> @constrained_vector_log_v4f64() {
+define <4 x double> @constrained_vector_log_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_log_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI64_0@toc@ha
@@ -4218,9 +3981,6 @@ define <4 x double> @constrained_vector_log_v4f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI64_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI64_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -4263,14 +4023,12 @@ entry:
   ret <4 x double> %log
 }
 
-define <1 x float> @constrained_vector_log10_v1f32() {
+define <1 x float> @constrained_vector_log10_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_log10_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -32(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI65_0@toc@ha
 ; PC64LE-NEXT:    lfs 1, .LCPI65_0@toc@l(3)
 ; PC64LE-NEXT:    bl log10f
@@ -4287,8 +4045,6 @@ define <1 x float> @constrained_vector_log10_v1f32() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -32(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI65_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI65_0@toc@l(3)
 ; PC64LE9-NEXT:    bl log10f
@@ -4307,14 +4063,12 @@ entry:
   ret <1 x float> %log10
 }
 
-define <2 x double> @constrained_vector_log10_v2f64() {
+define <2 x double> @constrained_vector_log10_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_log10_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -64(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI66_0@toc@ha
 ; PC64LE-NEXT:    lfd 1, .LCPI66_0@toc@l(3)
 ; PC64LE-NEXT:    bl log10
@@ -4340,8 +4094,6 @@ define <2 x double> @constrained_vector_log10_v2f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -48(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI66_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI66_0@toc@l(3)
 ; PC64LE9-NEXT:    bl log10
@@ -4367,14 +4119,10 @@ entry:
   ret <2 x double> %log10
 }
 
-define <3 x float> @constrained_vector_log10_v3f32() {
+define <3 x float> @constrained_vector_log10_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_log10_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
-; PC64LE-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f30, -16
-; PC64LE-NEXT:    .cfi_offset f31, -8
 ; PC64LE-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    std 0, 16(1)
@@ -4414,10 +4162,6 @@ define <3 x float> @constrained_vector_log10_v3f32() {
 ; PC64LE9-LABEL: constrained_vector_log10_v3f32:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    mflr 0
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f30, -16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
 ; PC64LE9-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    std 0, 16(1)
@@ -4461,15 +4205,12 @@ entry:
   ret <3 x float> %log10
 }
 
-define <3 x double> @constrained_vector_log10_v3f64() {
+define <3 x double> @constrained_vector_log10_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_log10_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI68_0@toc@ha
@@ -4506,9 +4247,6 @@ define <3 x double> @constrained_vector_log10_v3f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI68_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI68_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -4543,15 +4281,12 @@ entry:
   ret <3 x double> %log10
 }
 
-define <4 x double> @constrained_vector_log10_v4f64() {
+define <4 x double> @constrained_vector_log10_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_log10_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI69_0@toc@ha
@@ -4597,9 +4332,6 @@ define <4 x double> @constrained_vector_log10_v4f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI69_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI69_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -4642,14 +4374,12 @@ entry:
   ret <4 x double> %log10
 }
 
-define <1 x float> @constrained_vector_log2_v1f32() {
+define <1 x float> @constrained_vector_log2_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_log2_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -32(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI70_0@toc@ha
 ; PC64LE-NEXT:    lfs 1, .LCPI70_0@toc@l(3)
 ; PC64LE-NEXT:    bl log2f
@@ -4666,8 +4396,6 @@ define <1 x float> @constrained_vector_log2_v1f32() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -32(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI70_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI70_0@toc@l(3)
 ; PC64LE9-NEXT:    bl log2f
@@ -4686,14 +4414,12 @@ entry:
   ret <1 x float> %log2
 }
 
-define <2 x double> @constrained_vector_log2_v2f64() {
+define <2 x double> @constrained_vector_log2_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_log2_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -64(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI71_0@toc@ha
 ; PC64LE-NEXT:    lfd 1, .LCPI71_0@toc@l(3)
 ; PC64LE-NEXT:    bl log2
@@ -4719,8 +4445,6 @@ define <2 x double> @constrained_vector_log2_v2f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -48(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI71_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI71_0@toc@l(3)
 ; PC64LE9-NEXT:    bl log2
@@ -4746,14 +4470,10 @@ entry:
   ret <2 x double> %log2
 }
 
-define <3 x float> @constrained_vector_log2_v3f32() {
+define <3 x float> @constrained_vector_log2_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_log2_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
-; PC64LE-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f30, -16
-; PC64LE-NEXT:    .cfi_offset f31, -8
 ; PC64LE-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    std 0, 16(1)
@@ -4793,10 +4513,6 @@ define <3 x float> @constrained_vector_log2_v3f32() {
 ; PC64LE9-LABEL: constrained_vector_log2_v3f32:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    mflr 0
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f30, -16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
 ; PC64LE9-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    std 0, 16(1)
@@ -4840,15 +4556,12 @@ entry:
   ret <3 x float> %log2
 }
 
-define <3 x double> @constrained_vector_log2_v3f64() {
+define <3 x double> @constrained_vector_log2_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_log2_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI73_0@toc@ha
@@ -4885,9 +4598,6 @@ define <3 x double> @constrained_vector_log2_v3f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI73_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI73_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -4922,15 +4632,12 @@ entry:
   ret <3 x double> %log2
 }
 
-define <4 x double> @constrained_vector_log2_v4f64() {
+define <4 x double> @constrained_vector_log2_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_log2_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI74_0@toc@ha
@@ -4976,9 +4683,6 @@ define <4 x double> @constrained_vector_log2_v4f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI74_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI74_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -5021,14 +4725,12 @@ entry:
   ret <4 x double> %log2
 }
 
-define <1 x float> @constrained_vector_rint_v1f32() {
+define <1 x float> @constrained_vector_rint_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_rint_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -32(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI75_0@toc@ha
 ; PC64LE-NEXT:    lfs 1, .LCPI75_0@toc@l(3)
 ; PC64LE-NEXT:    bl rintf
@@ -5045,8 +4747,6 @@ define <1 x float> @constrained_vector_rint_v1f32() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -32(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI75_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI75_0@toc@l(3)
 ; PC64LE9-NEXT:    bl rintf
@@ -5065,14 +4765,12 @@ entry:
   ret <1 x float> %rint
 }
 
-define <2 x double> @constrained_vector_rint_v2f64() {
+define <2 x double> @constrained_vector_rint_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_rint_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -64(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI76_0@toc@ha
 ; PC64LE-NEXT:    lfd 1, .LCPI76_0@toc@l(3)
 ; PC64LE-NEXT:    bl rint
@@ -5098,8 +4796,6 @@ define <2 x double> @constrained_vector_rint_v2f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -48(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI76_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI76_0@toc@l(3)
 ; PC64LE9-NEXT:    bl rint
@@ -5125,14 +4821,10 @@ entry:
   ret <2 x double> %rint
 }
 
-define <3 x float> @constrained_vector_rint_v3f32() {
+define <3 x float> @constrained_vector_rint_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_rint_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
-; PC64LE-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f30, -16
-; PC64LE-NEXT:    .cfi_offset f31, -8
 ; PC64LE-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    std 0, 16(1)
@@ -5172,10 +4864,6 @@ define <3 x float> @constrained_vector_rint_v3f32() {
 ; PC64LE9-LABEL: constrained_vector_rint_v3f32:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    mflr 0
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f30, -16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
 ; PC64LE9-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    std 0, 16(1)
@@ -5219,15 +4907,12 @@ define <3 x float> @constrained_vector_rint_v3f32() {
   ret <3 x float> %rint
 }
 
-define <3 x double> @constrained_vector_rint_v3f64() {
+define <3 x double> @constrained_vector_rint_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_rint_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI78_0@toc@ha
@@ -5264,9 +4949,6 @@ define <3 x double> @constrained_vector_rint_v3f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI78_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI78_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -5301,15 +4983,12 @@ entry:
   ret <3 x double> %rint
 }
 
-define <4 x double> @constrained_vector_rint_v4f64() {
+define <4 x double> @constrained_vector_rint_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_rint_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI79_0@toc@ha
@@ -5355,9 +5034,6 @@ define <4 x double> @constrained_vector_rint_v4f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI79_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI79_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -5400,14 +5076,12 @@ entry:
   ret <4 x double> %rint
 }
 
-define <1 x float> @constrained_vector_nearbyint_v1f32() {
+define <1 x float> @constrained_vector_nearbyint_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_nearbyint_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -32(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI80_0@toc@ha
 ; PC64LE-NEXT:    lfs 1, .LCPI80_0@toc@l(3)
 ; PC64LE-NEXT:    bl nearbyintf
@@ -5424,8 +5098,6 @@ define <1 x float> @constrained_vector_nearbyint_v1f32() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -32(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI80_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI80_0@toc@l(3)
 ; PC64LE9-NEXT:    bl nearbyintf
@@ -5444,14 +5116,12 @@ entry:
   ret <1 x float> %nearby
 }
 
-define <2 x double> @constrained_vector_nearbyint_v2f64() {
+define <2 x double> @constrained_vector_nearbyint_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_nearbyint_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -64(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI81_0@toc@ha
 ; PC64LE-NEXT:    lfd 1, .LCPI81_0@toc@l(3)
 ; PC64LE-NEXT:    bl nearbyint
@@ -5477,8 +5147,6 @@ define <2 x double> @constrained_vector_nearbyint_v2f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -48(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI81_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI81_0@toc@l(3)
 ; PC64LE9-NEXT:    bl nearbyint
@@ -5504,14 +5172,10 @@ entry:
   ret <2 x double> %nearby
 }
 
-define <3 x float> @constrained_vector_nearbyint_v3f32() {
+define <3 x float> @constrained_vector_nearbyint_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_nearbyint_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
-; PC64LE-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f30, -16
-; PC64LE-NEXT:    .cfi_offset f31, -8
 ; PC64LE-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    std 0, 16(1)
@@ -5551,10 +5215,6 @@ define <3 x float> @constrained_vector_nearbyint_v3f32() {
 ; PC64LE9-LABEL: constrained_vector_nearbyint_v3f32:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    mflr 0
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f30, -16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
 ; PC64LE9-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    std 0, 16(1)
@@ -5598,15 +5258,12 @@ entry:
   ret <3 x float> %nearby
 }
 
-define <3 x double> @constrained_vector_nearby_v3f64() {
+define <3 x double> @constrained_vector_nearby_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_nearby_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI83_0@toc@ha
@@ -5643,9 +5300,6 @@ define <3 x double> @constrained_vector_nearby_v3f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI83_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI83_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -5680,15 +5334,12 @@ entry:
   ret <3 x double> %nearby
 }
 
-define <4 x double> @constrained_vector_nearbyint_v4f64() {
+define <4 x double> @constrained_vector_nearbyint_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_nearbyint_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
 ; PC64LE-NEXT:    addis 3, 2, .LCPI84_0@toc@ha
@@ -5734,9 +5385,6 @@ define <4 x double> @constrained_vector_nearbyint_v4f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI84_0@toc@ha
 ; PC64LE9-NEXT:    lfd 1, .LCPI84_0@toc@l(3)
 ; PC64LE9-NEXT:    stxv 63, 48(1) # 16-byte Folded Spill
@@ -5779,14 +5427,12 @@ entry:
   ret <4 x double> %nearby
 }
 
-define <1 x float> @constrained_vector_maxnum_v1f32() {
+define <1 x float> @constrained_vector_maxnum_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_maxnum_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -32(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI85_0@toc@ha
 ; PC64LE-NEXT:    addis 4, 2, .LCPI85_1@toc@ha
 ; PC64LE-NEXT:    lfs 1, .LCPI85_0@toc@l(3)
@@ -5805,8 +5451,6 @@ define <1 x float> @constrained_vector_maxnum_v1f32() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -32(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI85_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI85_0@toc@l(3)
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI85_1@toc@ha
@@ -5827,14 +5471,12 @@ entry:
   ret <1 x float> %max
 }
 
-define <2 x double> @constrained_vector_maxnum_v2f64() {
+define <2 x double> @constrained_vector_maxnum_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_maxnum_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -64(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI86_0@toc@ha
 ; PC64LE-NEXT:    addis 4, 2, .LCPI86_1@toc@ha
 ; PC64LE-NEXT:    lfs 1, .LCPI86_0@toc@l(3)
@@ -5864,8 +5506,6 @@ define <2 x double> @constrained_vector_maxnum_v2f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -48(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI86_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI86_0@toc@l(3)
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI86_1@toc@ha
@@ -5896,15 +5536,10 @@ entry:
   ret <2 x double> %max
 }
 
-define <3 x float> @constrained_vector_maxnum_v3f32() {
+define <3 x float> @constrained_vector_maxnum_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_maxnum_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
-; PC64LE-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f29, -24
-; PC64LE-NEXT:    .cfi_offset f30, -16
-; PC64LE-NEXT:    .cfi_offset f31, -8
 ; PC64LE-NEXT:    stfd 29, -24(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
@@ -5952,11 +5587,6 @@ define <3 x float> @constrained_vector_maxnum_v3f32() {
 ; PC64LE9-LABEL: constrained_vector_maxnum_v3f32:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    mflr 0
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f29, -24
-; PC64LE9-NEXT:    .cfi_offset f30, -16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
 ; PC64LE9-NEXT:    stfd 29, -24(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
@@ -6009,15 +5639,12 @@ entry:
   ret <3 x float> %max
 }
 
-define <3 x double> @constrained_vector_max_v3f64() {
+define <3 x double> @constrained_vector_max_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_max_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    addis 4, 2, .LCPI88_1@toc@ha
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
@@ -6060,9 +5687,6 @@ define <3 x double> @constrained_vector_max_v3f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI88_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI88_0@toc@l(3)
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI88_1@toc@ha
@@ -6104,15 +5728,12 @@ entry:
   ret <3 x double> %max
 }
 
-define <4 x double> @constrained_vector_maxnum_v4f64() {
+define <4 x double> @constrained_vector_maxnum_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_maxnum_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    addis 4, 2, .LCPI89_1@toc@ha
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
@@ -6166,9 +5787,6 @@ define <4 x double> @constrained_vector_maxnum_v4f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI89_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI89_0@toc@l(3)
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI89_1@toc@ha
@@ -6221,14 +5839,12 @@ entry:
   ret <4 x double> %max
 }
 
-define <1 x float> @constrained_vector_minnum_v1f32() {
+define <1 x float> @constrained_vector_minnum_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_minnum_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -32(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI90_0@toc@ha
 ; PC64LE-NEXT:    addis 4, 2, .LCPI90_1@toc@ha
 ; PC64LE-NEXT:    lfs 1, .LCPI90_0@toc@l(3)
@@ -6247,8 +5863,6 @@ define <1 x float> @constrained_vector_minnum_v1f32() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -32(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 32
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI90_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI90_0@toc@l(3)
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI90_1@toc@ha
@@ -6269,14 +5883,12 @@ define <1 x float> @constrained_vector_minnum_v1f32() {
   ret <1 x float> %min
 }
 
-define <2 x double> @constrained_vector_minnum_v2f64() {
+define <2 x double> @constrained_vector_minnum_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_minnum_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -64(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE-NEXT:    .cfi_offset lr, 16
 ; PC64LE-NEXT:    addis 3, 2, .LCPI91_0@toc@ha
 ; PC64LE-NEXT:    addis 4, 2, .LCPI91_1@toc@ha
 ; PC64LE-NEXT:    lfs 1, .LCPI91_0@toc@l(3)
@@ -6306,8 +5918,6 @@ define <2 x double> @constrained_vector_minnum_v2f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -48(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 48
-; PC64LE9-NEXT:    .cfi_offset lr, 16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI91_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI91_0@toc@l(3)
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI91_1@toc@ha
@@ -6338,15 +5948,10 @@ entry:
   ret <2 x double> %min
 }
 
-define <3 x float> @constrained_vector_minnum_v3f32() {
+define <3 x float> @constrained_vector_minnum_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_minnum_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
-; PC64LE-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset f29, -24
-; PC64LE-NEXT:    .cfi_offset f30, -16
-; PC64LE-NEXT:    .cfi_offset f31, -8
 ; PC64LE-NEXT:    stfd 29, -24(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
@@ -6394,11 +5999,6 @@ define <3 x float> @constrained_vector_minnum_v3f32() {
 ; PC64LE9-LABEL: constrained_vector_minnum_v3f32:
 ; PC64LE9:       # %bb.0: # %entry
 ; PC64LE9-NEXT:    mflr 0
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset f29, -24
-; PC64LE9-NEXT:    .cfi_offset f30, -16
-; PC64LE9-NEXT:    .cfi_offset f31, -8
 ; PC64LE9-NEXT:    stfd 29, -24(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 30, -16(1) # 8-byte Folded Spill
 ; PC64LE9-NEXT:    stfd 31, -8(1) # 8-byte Folded Spill
@@ -6451,15 +6051,12 @@ entry:
   ret <3 x float> %min
 }
 
-define <3 x double> @constrained_vector_min_v3f64() {
+define <3 x double> @constrained_vector_min_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_min_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    addis 4, 2, .LCPI93_1@toc@ha
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
@@ -6502,9 +6099,6 @@ define <3 x double> @constrained_vector_min_v3f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI93_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI93_0@toc@l(3)
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI93_1@toc@ha
@@ -6546,15 +6140,12 @@ entry:
   ret <3 x double> %min
 }
 
-define <4 x double> @constrained_vector_minnum_v4f64() {
+define <4 x double> @constrained_vector_minnum_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_minnum_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    mflr 0
 ; PC64LE-NEXT:    std 0, 16(1)
 ; PC64LE-NEXT:    stdu 1, -80(1)
-; PC64LE-NEXT:    .cfi_def_cfa_offset 80
-; PC64LE-NEXT:    .cfi_offset lr, 16
-; PC64LE-NEXT:    .cfi_offset v31, -16
 ; PC64LE-NEXT:    li 3, 64
 ; PC64LE-NEXT:    addis 4, 2, .LCPI94_1@toc@ha
 ; PC64LE-NEXT:    stxvd2x 63, 1, 3 # 16-byte Folded Spill
@@ -6608,9 +6199,6 @@ define <4 x double> @constrained_vector_minnum_v4f64() {
 ; PC64LE9-NEXT:    mflr 0
 ; PC64LE9-NEXT:    std 0, 16(1)
 ; PC64LE9-NEXT:    stdu 1, -64(1)
-; PC64LE9-NEXT:    .cfi_def_cfa_offset 64
-; PC64LE9-NEXT:    .cfi_offset lr, 16
-; PC64LE9-NEXT:    .cfi_offset v31, -16
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI94_0@toc@ha
 ; PC64LE9-NEXT:    lfs 1, .LCPI94_0@toc@l(3)
 ; PC64LE9-NEXT:    addis 3, 2, .LCPI94_1@toc@ha
@@ -6663,7 +6251,7 @@ entry:
   ret <4 x double> %min
 }
 
-define <1 x float> @constrained_vector_fptrunc_v1f64() {
+define <1 x float> @constrained_vector_fptrunc_v1f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_fptrunc_v1f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI95_0@toc@ha
@@ -6689,7 +6277,7 @@ entry:
   ret <1 x float> %result
 }
 
-define <2 x float> @constrained_vector_fptrunc_v2f64() {
+define <2 x float> @constrained_vector_fptrunc_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_fptrunc_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI96_0@toc@ha
@@ -6727,7 +6315,7 @@ entry:
   ret <2 x float> %result
 }
 
-define <3 x float> @constrained_vector_fptrunc_v3f64() {
+define <3 x float> @constrained_vector_fptrunc_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_fptrunc_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI97_0@toc@ha
@@ -6784,7 +6372,7 @@ entry:
   ret <3 x float> %result
 }
 
-define <4 x float> @constrained_vector_fptrunc_v4f64() {
+define <4 x float> @constrained_vector_fptrunc_v4f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_fptrunc_v4f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI98_0@toc@ha
@@ -6827,7 +6415,7 @@ entry:
   ret <4 x float> %result
 }
 
-define <1 x double> @constrained_vector_fpext_v1f32() {
+define <1 x double> @constrained_vector_fpext_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_fpext_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI99_0@toc@ha
@@ -6848,7 +6436,7 @@ entry:
   ret <1 x double> %result
 }
 
-define <2 x double> @constrained_vector_fpext_v2f32() {
+define <2 x double> @constrained_vector_fpext_v2f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_fpext_v2f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI100_0@toc@ha
@@ -6873,7 +6461,7 @@ entry:
   ret <2 x double> %result
 }
 
-define <3 x double> @constrained_vector_fpext_v3f32() {
+define <3 x double> @constrained_vector_fpext_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_fpext_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI101_0@toc@ha
@@ -6901,7 +6489,7 @@ entry:
   ret <3 x double> %result
 }
 
-define <4 x double> @constrained_vector_fpext_v4f32() {
+define <4 x double> @constrained_vector_fpext_v4f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_fpext_v4f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI102_0@toc@ha
@@ -6937,7 +6525,7 @@ entry:
   ret <4 x double> %result
 }
 
-define <1 x float> @constrained_vector_ceil_v1f32() {
+define <1 x float> @constrained_vector_ceil_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_ceil_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI103_0@toc@ha
@@ -6963,7 +6551,7 @@ entry:
   ret <1 x float> %ceil
 }
 
-define <2 x double> @constrained_vector_ceil_v2f64() {
+define <2 x double> @constrained_vector_ceil_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_ceil_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI104_0@toc@ha
@@ -6988,7 +6576,7 @@ entry:
   ret <2 x double> %ceil
 }
 
-define <3 x float> @constrained_vector_ceil_v3f32() {
+define <3 x float> @constrained_vector_ceil_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_ceil_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI105_2@toc@ha
@@ -7044,7 +6632,7 @@ entry:
   ret <3 x float> %ceil
 }
 
-define <3 x double> @constrained_vector_ceil_v3f64() {
+define <3 x double> @constrained_vector_ceil_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_ceil_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI106_1@toc@ha
@@ -7081,7 +6669,7 @@ entry:
   ret <3 x double> %ceil
 }
 
-define <1 x float> @constrained_vector_floor_v1f32() {
+define <1 x float> @constrained_vector_floor_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_floor_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI107_0@toc@ha
@@ -7108,7 +6696,7 @@ entry:
 }
 
 
-define <2 x double> @constrained_vector_floor_v2f64() {
+define <2 x double> @constrained_vector_floor_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_floor_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI108_0@toc@ha
@@ -7133,7 +6721,7 @@ entry:
   ret <2 x double> %floor
 }
 
-define <3 x float> @constrained_vector_floor_v3f32() {
+define <3 x float> @constrained_vector_floor_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_floor_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI109_2@toc@ha
@@ -7189,7 +6777,7 @@ entry:
   ret <3 x float> %floor
 }
 
-define <3 x double> @constrained_vector_floor_v3f64() {
+define <3 x double> @constrained_vector_floor_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_floor_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI110_1@toc@ha
@@ -7226,7 +6814,7 @@ entry:
   ret <3 x double> %floor
 }
 
-define <1 x float> @constrained_vector_round_v1f32() {
+define <1 x float> @constrained_vector_round_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_round_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI111_0@toc@ha
@@ -7252,7 +6840,7 @@ entry:
   ret <1 x float> %round
 }
 
-define <2 x double> @constrained_vector_round_v2f64() {
+define <2 x double> @constrained_vector_round_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_round_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI112_0@toc@ha
@@ -7277,7 +6865,7 @@ entry:
   ret <2 x double> %round
 }
 
-define <3 x float> @constrained_vector_round_v3f32() {
+define <3 x float> @constrained_vector_round_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_round_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI113_2@toc@ha
@@ -7334,7 +6922,7 @@ entry:
 }
 
 
-define <3 x double> @constrained_vector_round_v3f64() {
+define <3 x double> @constrained_vector_round_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_round_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI114_1@toc@ha
@@ -7371,7 +6959,7 @@ entry:
   ret <3 x double> %round
 }
 
-define <1 x float> @constrained_vector_trunc_v1f32() {
+define <1 x float> @constrained_vector_trunc_v1f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_trunc_v1f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI115_0@toc@ha
@@ -7397,7 +6985,7 @@ entry:
   ret <1 x float> %trunc
 }
 
-define <2 x double> @constrained_vector_trunc_v2f64() {
+define <2 x double> @constrained_vector_trunc_v2f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_trunc_v2f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI116_0@toc@ha
@@ -7422,7 +7010,7 @@ entry:
   ret <2 x double> %trunc
 }
 
-define <3 x float> @constrained_vector_trunc_v3f32() {
+define <3 x float> @constrained_vector_trunc_v3f32() nounwind {
 ; PC64LE-LABEL: constrained_vector_trunc_v3f32:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI117_2@toc@ha
@@ -7478,7 +7066,7 @@ entry:
   ret <3 x float> %trunc
 }
 
-define <3 x double> @constrained_vector_trunc_v3f64() {
+define <3 x double> @constrained_vector_trunc_v3f64() nounwind {
 ; PC64LE-LABEL: constrained_vector_trunc_v3f64:
 ; PC64LE:       # %bb.0: # %entry
 ; PC64LE-NEXT:    addis 3, 2, .LCPI118_1@toc@ha