]> granicus.if.org Git - yasm/commitdiff
* x86id.c: Add support for 64-bit far jmp/call. These are not listed in the
authorPeter Johnson <peter@tortall.net>
Fri, 12 May 2006 02:12:19 +0000 (02:12 -0000)
committerPeter Johnson <peter@tortall.net>
Fri, 12 May 2006 02:12:19 +0000 (02:12 -0000)
AMD64 ISA reference but are in the Intel EM64T reference.
* x86arch.h: Add CPU_EM64T flag.
* x86parse.gap: Add CPU_EM64T as feature and enable it as part of "prescott".
* far64.asm: Test for 64-bit far jmp/call.

svn path=/trunk/yasm/; revision=1540

modules/arch/x86/tests/Makefile.inc
modules/arch/x86/tests/far64.asm [new file with mode: 0644]
modules/arch/x86/tests/far64.errwarn [new file with mode: 0644]
modules/arch/x86/tests/far64.hex [new file with mode: 0644]
modules/arch/x86/x86arch.h
modules/arch/x86/x86id.c
modules/arch/x86/x86parse.gap

index ac154bd389ba0202fe705a1e088ba08c0c4df19d..037ec8228bd84a9fca3c1b51e37a12a153e6ce7f 100644 (file)
@@ -39,6 +39,9 @@ EXTRA_DIST += modules/arch/x86/tests/effaddr.hex
 EXTRA_DIST += modules/arch/x86/tests/enter.asm
 EXTRA_DIST += modules/arch/x86/tests/enter.errwarn
 EXTRA_DIST += modules/arch/x86/tests/enter.hex
+EXTRA_DIST += modules/arch/x86/tests/far64.asm
+EXTRA_DIST += modules/arch/x86/tests/far64.errwarn
+EXTRA_DIST += modules/arch/x86/tests/far64.hex
 EXTRA_DIST += modules/arch/x86/tests/farbasic.asm
 EXTRA_DIST += modules/arch/x86/tests/farbasic.errwarn
 EXTRA_DIST += modules/arch/x86/tests/farbasic.hex
diff --git a/modules/arch/x86/tests/far64.asm b/modules/arch/x86/tests/far64.asm
new file mode 100644 (file)
index 0000000..4456b88
--- /dev/null
@@ -0,0 +1,7 @@
+[bits 64]
+call far dword [0]
+call far qword [0]
+call far [0]
+jmp far dword [0]
+jmp far qword [0]
+jmp far [0]
diff --git a/modules/arch/x86/tests/far64.errwarn b/modules/arch/x86/tests/far64.errwarn
new file mode 100644 (file)
index 0000000..e69de29
diff --git a/modules/arch/x86/tests/far64.hex b/modules/arch/x86/tests/far64.hex
new file mode 100644 (file)
index 0000000..88bdcd7
--- /dev/null
@@ -0,0 +1,44 @@
+ff 
+1c 
+25 
+00 
+00 
+00 
+00 
+48 
+ff 
+1c 
+25 
+00 
+00 
+00 
+00 
+ff 
+1c 
+25 
+00 
+00 
+00 
+00 
+ff 
+2c 
+25 
+00 
+00 
+00 
+00 
+48 
+ff 
+2c 
+25 
+00 
+00 
+00 
+00 
+ff 
+2c 
+25 
+00 
+00 
+00 
+00 
index f419d030bceca42f58ac67781f52028a7f722557..88ed771d070ea830f0d26b34c538478fefa54372 100644 (file)
@@ -57,6 +57,7 @@
 #define CPU_Priv    (1UL<<24)  /* Priveleged instruction */
 #define CPU_SVM            (1UL<<25)   /* Secure Virtual Machine instruction */
 #define CPU_PadLock (1UL<<25)  /* VIA PadLock instruction */
+#define CPU_EM64T   (1UL<<26)  /* Intel EM64T or better */
 
 /* Technically not CPU capabilities, they do affect what instructions are
  * available.  These are tested against BITS==64.
index 9dd2ac880a581f5f04a1e8393eb93592b6cf7f41..03770ae2ce6e8db58bb4ffa119499fc25e3915c5 100644 (file)
@@ -1186,6 +1186,8 @@ static const x86_insn_info call_insn[] = {
       {OPT_Mem|OPS_16|OPTM_Far|OPA_EA, 0, 0} },
     { CPU_386, 0, 32, 0, 0, 1, {0xFF, 0, 0}, 3, 1,
       {OPT_Mem|OPS_32|OPTM_Far|OPA_EA, 0, 0} },
+    { CPU_EM64T|CPU_64, 0, 64, 0, 0, 1, {0xFF, 0, 0}, 3, 1,
+      {OPT_Mem|OPS_64|OPTM_Far|OPA_EA, 0, 0} },
     { CPU_Any, 0, 0, 0, 0, 1, {0xFF, 0, 0}, 3, 1,
       {OPT_Mem|OPS_Any|OPTM_Far|OPA_EA, 0, 0} }
 };
@@ -1238,6 +1240,8 @@ static const x86_insn_info jmp_insn[] = {
       {OPT_Mem|OPS_16|OPTM_Far|OPA_EA, 0, 0} },
     { CPU_386, 0, 32, 0, 0, 1, {0xFF, 0, 0}, 5, 1,
       {OPT_Mem|OPS_32|OPTM_Far|OPA_EA, 0, 0} },
+    { CPU_EM64T|CPU_64, 0, 64, 0, 0, 1, {0xFF, 0, 0}, 5, 1,
+      {OPT_Mem|OPS_64|OPTM_Far|OPA_EA, 0, 0} },
     { CPU_Any, 0, 0, 0, 0, 1, {0xFF, 0, 0}, 5, 1,
       {OPT_Mem|OPS_Any|OPTM_Far|OPA_EA, 0, 0} }
 };
index b483841aaebcb8d6986a13eaf8699cd0141b8371..ffcc9bcb23359fbc0bb4bf0f156dd605b5821093 100644 (file)
@@ -880,7 +880,7 @@ CPU_ALIAS   opteron         hammer
 CPU_ALIAS      athlon64        hammer
 CPU_ALIAS      athlon-64       hammer
 CPU            prescott CPU_186|CPU_286|CPU_386|CPU_486|CPU_586|CPU_686|\
-                       CPU_K6|CPU_Athlon|CPU_Hammer|CPU_FPU|CPU_MMX|\
+                       CPU_K6|CPU_Athlon|CPU_Hammer|CPU_EM64T|CPU_FPU|CPU_MMX|\
                        CPU_SSE|CPU_SSE2|CPU_SSE3|CPU_3DNow|CPU_SMM|\
                        CPU_Prot|CPU_Priv
 
@@ -903,6 +903,7 @@ CPU_FEATURE obs     CPU_Obs
 CPU_FEATURE    priv    CPU_Priv
 CPU_FEATURE    svm     CPU_SVM
 CPU_FEATURE    padlock CPU_PadLock
+CPU_FEATURE    em64t   CPU_EM64T
 
 
 # TARGETMOD parameters: