#0 and #1 -> @0 and @1 (for the CPU field), to avoid warning from Perl.

svn path=/trunk/yasm/; revision=102

diff --git a/modules/parsers/nasm/gen_instr.pl b/modules/parsers/nasm/gen_instr.pl
index 142bf21291157731d9c9d7d378abc3bee1773be1..b22f8159a1d59cd680411a6dc29cda33b610b5fe 100755 (executable)
--- a/modules/parsers/nasm/gen_instr.pl
+++ b/modules/parsers/nasm/gen_instr.pl
@@ -1,5 +1,5 @@
 #!/usr/bin/perl -w
-# $Id: gen_instr.pl,v 1.11 2001/07/05 04:53:13 mu Exp $
+# $Id: gen_instr.pl,v 1.12 2001/07/05 05:41:45 peter Exp $
 # Generates bison.y and token.l from instrs.dat for YASM
 #
 #    Copyright (C) 2001  Michael Urman
@@ -93,7 +93,7 @@ my $valid_cpus = join '|', qw(
     SMM
     CYRIX
     UNDOC OBS PRIV PROT
-    #0 #1
+    @0 @1
 );
 
 # track errors and warnings rather than die'ing on the first.

diff --git a/src/gen_instr.pl b/src/gen_instr.pl
index 142bf21291157731d9c9d7d378abc3bee1773be1..b22f8159a1d59cd680411a6dc29cda33b610b5fe 100755 (executable)
--- a/src/gen_instr.pl
+++ b/src/gen_instr.pl
@@ -1,5 +1,5 @@
 #!/usr/bin/perl -w
-# $Id: gen_instr.pl,v 1.11 2001/07/05 04:53:13 mu Exp $
+# $Id: gen_instr.pl,v 1.12 2001/07/05 05:41:45 peter Exp $
 # Generates bison.y and token.l from instrs.dat for YASM
 #
 #    Copyright (C) 2001  Michael Urman
@@ -93,7 +93,7 @@ my $valid_cpus = join '|', qw(
     SMM
     CYRIX
     UNDOC OBS PRIV PROT
-    #0 #1
+    @0 @1
 );
 
 # track errors and warnings rather than die'ing on the first.

diff --git a/src/instrs.dat b/src/instrs.dat
index 3d72ff86e2bc5d1e62cc4fd19365c6361b161065..ce3c7446573e46408b2cb21e8fd2ee025cc8985c 100644 (file)
--- a/src/instrs.dat
+++ b/src/instrs.dat
@@ -1,4 +1,4 @@
-; $Id: instrs.dat,v 1.22 2001/07/05 05:38:40 peter Exp $
+; $Id: instrs.dat,v 1.23 2001/07/05 05:41:45 peter Exp $
 ; List of valid instruction/operand combinations
 ;
 ;    Copyright (C) 2001  Peter Johnson
@@ -63,12 +63,12 @@
 ;   the instruction using the group during lexing & parsing.  These parameters
 ;   may be in the opcode, effaddr, or immediate.
 ;  The first CPU grouping for the instruction is OR'ed with the CPU value in
-;   the group CPU fields with #0 in their list.  This allows one grouping to
+;   the group CPU fields with @0 in their list.  This allows one grouping to
 ;   be used for instructions with different CPU values.
 ;  Restrictions on groupings:
 ;   - $0.? may not appear in the operand, the opsize, the first part of the
 ;     effaddr, the second part of the imm, or the CPU fields.
-;   - #0, #1 may only appear in the CPU field.
+;   - @0, @1 may only appear in the CPU field.
 ;  Restrictions on instructions based on groupings:
 ;   - no other operand combinations are allowed (eg, if an instruction uses a
 ;     group, that must be the ONLY line for the instruction)
@@ -89,22 +89,22 @@
 ;
 ; !Grp Operands                OpSize  Opcode          EffAddr         Imm     CPU
 ; Inst Operands                OpSize  Opcode          EffAddr Imm     CPU
-; Inst!Grp             Parameters      CPU #0          CPU #1
+; Inst!Grp             Parameters      CPU @0          CPU @1
 ;
 ; Groupings used throughout
 ;
 ;  One byte opcode instructions with no operands:
-!onebyte       nil             nil     $0.1            nil             nil     #0
-!onebyte16     nil             16      $0.1            nil             nil     #0
+!onebyte       nil             nil     $0.1            nil             nil     @0
+!onebyte16     nil             16      $0.1            nil             nil     @0
 !onebyte32     nil             32      $0.1            nil             nil     386
 ;  Two byte opcode instructions with no operands:
-!twobyte       nil             nil     $0.1,$0.2       nil             nil     #0
+!twobyte       nil             nil     $0.1,$0.2       nil             nil     @0
 ;  Three byte opcode instructions with no operands:
-!threebyte     nil             nil     $0.1,$0.2,$0.3  nil             nil     #0
+!threebyte     nil             nil     $0.1,$0.2,$0.3  nil             nil     @0
 ;  One byte opcode instructions with general memory operand:
-!onebytemem    mem             nil     $0.1            $1,$0.2         nil     #0
+!onebytemem    mem             nil     $0.1            $1,$0.2         nil     @0
 ;  Two byte opcode instructions with general memory operand:
-!twobytemem    mem             nil     $0.1,$0.2       $1,$0.3         nil     #0
+!twobytemem    mem             nil     $0.1,$0.2       $1,$0.3         nil     @0
 ;
 ; Move instructions
 ;
@@ -528,7 +528,7 @@ nop!onebyte         90              8086
 ; Protection control
 ;
 ;  286 rm16 protected mode group (LLDT/LTR/STR/VERR/VERW):
-!prot286       rm16            nil     0F,00           $1,$0.1         nil     286,PROT,#0
+!prot286       rm16            nil     0F,00           $1,$0.1         nil     286,PROT,@0
 arpl   rm16,reg16              nil     63              $1,$2   nil     286,PROT
 lar    reg16,rm16              16      0F,02           $2,$1   nil     286,PROT
 lar    reg32,rm32              32      0F,02           $2,$1   nil     386,PROT
@@ -589,8 +589,8 @@ fxch        nil                     nil     D9,C9           nil     nil     8086,FPU
 !fcomg fpureg                  nil     D8,$0.2+$1      nil             nil     8086,FPU
 !fcomg ST0,fpureg              nil     D8,$0.2+$2      nil             nil     8086,FPU
 ;  Extended comparisons
-!fcomg2        fpureg                  nil     $0.1,$0.2+$1    nil             nil     #0,FPU
-!fcomg2        ST0,fpureg              nil     $0.1,$0.2+$2    nil             nil     #0,FPU
+!fcomg2        fpureg                  nil     $0.1,$0.2+$1    nil             nil     @0,FPU
+!fcomg2        ST0,fpureg              nil     $0.1,$0.2+$2    nil             nil     @0,FPU
 ;  Comparison (without pop)
 fcom!fcomg             2,D0
 ficom  mem16x                  nil     DE              $1,2    nil     8086,FPU
@@ -696,17 +696,17 @@ wait!onebyte              9B              8086
 ;
 ;  Compare & exchange, exchange & add
 ; arbitrary encoding, picked $1r,$2 instead of $2r,$1
-!cmpxchgxadd   reg8,reg8               nil     0F,$0.1         $1r,$2  nil     #0
-!cmpxchgxadd   mem,reg8                nil     0F,$0.1         $1,$2   nil     #0
-!cmpxchgxadd   mem8x,reg8              nil     0F,$0.1         $1,$2   nil     #0
+!cmpxchgxadd   reg8,reg8               nil     0F,$0.1         $1r,$2  nil     @0
+!cmpxchgxadd   mem,reg8                nil     0F,$0.1         $1,$2   nil     @0
+!cmpxchgxadd   mem8x,reg8              nil     0F,$0.1         $1,$2   nil     @0
 ; arbitrary encoding, picked $1r,$2 instead of $2r,$1
-!cmpxchgxadd   reg16,reg16             16      0F,$0.1+1       $1r,$2  nil     #0
-!cmpxchgxadd   mem,reg16               16      0F,$0.1+1       $1,$2   nil     #0
-!cmpxchgxadd   mem16x,reg16            16      0F,$0.1+1       $1,$2   nil     #0
+!cmpxchgxadd   reg16,reg16             16      0F,$0.1+1       $1r,$2  nil     @0
+!cmpxchgxadd   mem,reg16               16      0F,$0.1+1       $1,$2   nil     @0
+!cmpxchgxadd   mem16x,reg16            16      0F,$0.1+1       $1,$2   nil     @0
 ; arbitrary encoding, picked $1r,$2 instead of $2r,$1
-!cmpxchgxadd   reg32,reg32             32      0F,$0.1+1       $1r,$2  nil     #0
-!cmpxchgxadd   mem,reg32               32      0F,$0.1+1       $1,$2   nil     #0
-!cmpxchgxadd   mem32x,reg32            32      0F,$0.1+1       $1,$2   nil     #0
+!cmpxchgxadd   reg32,reg32             32      0F,$0.1+1       $1r,$2  nil     @0
+!cmpxchgxadd   mem,reg32               32      0F,$0.1+1       $1,$2   nil     @0
+!cmpxchgxadd   mem32x,reg32            32      0F,$0.1+1       $1,$2   nil     @0
 bswap  reg32                   32      0F,C8+$1        nil     nil     486
 xadd!cmpxchgxadd       C0              486
 cmpxchg!cmpxchgxadd    B0              486
@@ -753,8 +753,8 @@ pause!twobyte               F3,90           P4
 ; MMX/SSE2 instructions
 ;
 ;  General
-!mmxsse        MMXREG,rm64             nil     0F,$0.1         $2,$1           nil     #0,MMX
-!mmxsse        XMMREG,rm128            nil     66,0F,$0.1      $2,$1           nil     #1
+!mmxsse        MMXREG,rm64             nil     0F,$0.1         $2,$1           nil     @0,MMX
+!mmxsse        XMMREG,rm128            nil     66,0F,$0.1      $2,$1           nil     @1
 ;  Shifts
 !pshift        MMXREG,rm64             nil     0F,$0.1         $2,$1           nil     P5,MMX
 !pshift        XMMREG,rm128            nil     66,0F,$0.1      $2,$1           nil     P4,SSE2
@@ -825,8 +825,8 @@ pxor!mmxsse         EF              P5              P4,SSE2
 ; PIII (Katmai) new instructions / SIMD instructions
 ;
 ;  Standard
-!sseps XMMREG,rm128            nil     0F,$0.1         $2,$1           nil     #0
-!ssess XMMREG,rm128            nil     F3,0F,$0.1      $2,$1           nil     #0
+!sseps XMMREG,rm128            nil     0F,$0.1         $2,$1           nil     @0
+!ssess XMMREG,rm128            nil     F3,0F,$0.1      $2,$1           nil     @0
 ;  With immediate
 !ssepsimm      XMMREG,rm128,imm8       nil     0F,$0.1         $2,$1   $3,8    KATMAI,SSE
 addps!sseps            58              KATMAI,SSE
@@ -1033,7 +1033,7 @@ punpcklqdq!sse2pd 6C
 ;
 ; AMD 3DNow! instructions
 ;
-!now3d MMXREG,rm64             nil     0F,0F           $2,$1           $0.1,8  #0,3DNOW,AMD
+!now3d MMXREG,rm64             nil     0F,0F           $2,$1           $0.1,8  @0,3DNOW,AMD
 prefetch!twobytemem    0F,0D,0         P5,3DNOW,AMD
 prefetchw!twobytemem   0F,0D,1         P5,3DNOW,AMD
 femms!twobyte          0F,0E           P5,3DNOW,AMD

diff --git a/src/parsers/nasm/gen_instr.pl b/src/parsers/nasm/gen_instr.pl
index 142bf21291157731d9c9d7d378abc3bee1773be1..b22f8159a1d59cd680411a6dc29cda33b610b5fe 100755 (executable)
--- a/src/parsers/nasm/gen_instr.pl
+++ b/src/parsers/nasm/gen_instr.pl
@@ -1,5 +1,5 @@
 #!/usr/bin/perl -w
-# $Id: gen_instr.pl,v 1.11 2001/07/05 04:53:13 mu Exp $
+# $Id: gen_instr.pl,v 1.12 2001/07/05 05:41:45 peter Exp $
 # Generates bison.y and token.l from instrs.dat for YASM
 #
 #    Copyright (C) 2001  Michael Urman
@@ -93,7 +93,7 @@ my $valid_cpus = join '|', qw(
     SMM
     CYRIX
     UNDOC OBS PRIV PROT
-    #0 #1
+    @0 @1
 );
 
 # track errors and warnings rather than die'ing on the first.