]> granicus.if.org Git - llvm/commitdiff
[aarch64][globalisel] Fix a crash in selectAddrModeIndexed() caused by incorrect...
authorDaniel Sanders <daniel_l_sanders@apple.com>
Mon, 16 Oct 2017 05:39:30 +0000 (05:39 +0000)
committerDaniel Sanders <daniel_l_sanders@apple.com>
Mon, 16 Oct 2017 05:39:30 +0000 (05:39 +0000)
The wrong operand was being rendered to the result instruction.

The crash was detected by Bitcode/simd_ops/AArch64_halide_runtime.bc

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@315890 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AArch64/AArch64InstructionSelector.cpp

index 622bf995147d21a333c0b6bdfbbe68ad27435a2b..9fb005bb50bdaeb93a57bed470a83c1b065d3d83 100644 (file)
@@ -1497,7 +1497,11 @@ AArch64InstructionSelector::selectAddrModeIndexed(MachineOperand &Root,
       unsigned Scale = Log2_32(Size);
       if ((RHSC & (Size - 1)) == 0 && RHSC >= 0 && RHSC < (0x1000 << Scale)) {
         if (LHSDef->getOpcode() == TargetOpcode::G_FRAME_INDEX)
-          LHSDef = MRI.getVRegDef(LHSDef->getOperand(1).getReg());
+          return {{
+              [=](MachineInstrBuilder &MIB) { MIB.add(LHSDef->getOperand(1)); },
+              [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC >> Scale); },
+          }};
+
         return {{
             [=](MachineInstrBuilder &MIB) { MIB.add(LHS); },
             [=](MachineInstrBuilder &MIB) { MIB.addImm(RHSC >> Scale); },