Skip out of SimplifyDemandedBits for BITCAST of f16 to i16

Mirrors the existing exit path for f128, avoiding a crash later on.

Differential Revision: https://reviews.llvm.org/D49524

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@337506 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index fbe74f27b8fb1673fce0c50c271e092c69febdda..4c885f903637d60da6e791cad07e65abd8ae72b3 100644 (file)
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -1187,6 +1187,7 @@ bool TargetLowering::SimplifyDemandedBits(SDValue Op,
       bool OpVTLegal = isOperationLegalOrCustom(ISD::FGETSIGN, VT);
       bool i32Legal  = isOperationLegalOrCustom(ISD::FGETSIGN, MVT::i32);
       if ((OpVTLegal || i32Legal) && VT.isSimple() &&
+           Op.getOperand(0).getValueType() != MVT::f16 &&
            Op.getOperand(0).getValueType() != MVT::f128) {
         // Cannot eliminate/lower SHL for f128 yet.
         EVT Ty = OpVTLegal ? VT : MVT::i32;

diff --git a/test/CodeGen/X86/pr38038.ll b/test/CodeGen/X86/pr38038.ll
new file mode 100644 (file)
index 0000000..42ade7c
--- /dev/null
+++ b/test/CodeGen/X86/pr38038.ll
@@ -0,0 +1,10 @@
+; RUN: llc < %s
+; PR38038
+
+define i8 @crash(half)  {
+entry:
+  %1 = bitcast half %0 to i16
+  %.lobit = lshr i16 %1, 15
+  %2 = trunc i16 %.lobit to i8
+  ret i8 %2
+}