]> granicus.if.org Git - llvm/commitdiff
[SelectionDAG] computeKnownBits - simplified knownbits sign extension. NFCI.
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 13 Dec 2016 13:36:27 +0000 (13:36 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Tue, 13 Dec 2016 13:36:27 +0000 (13:36 +0000)
We don't need to extract+test the sign bit of the known ones/zeros, we can use sext which will handle all of this.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@289534 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/SelectionDAG.cpp

index 6608e32d43fccf9732bf9e953983ebda43284bbd..33c40f27c77e1df94eb27231c73a5525508afe9f 100644 (file)
@@ -2442,25 +2442,16 @@ void SelectionDAG::computeKnownBits(SDValue Op, APInt &KnownZero,
   case ISD::SIGN_EXTEND: {
     EVT InVT = Op.getOperand(0).getValueType();
     unsigned InBits = InVT.getScalarSizeInBits();
-    APInt NewBits   = APInt::getHighBitsSet(BitWidth, BitWidth - InBits);
 
     KnownZero = KnownZero.trunc(InBits);
     KnownOne = KnownOne.trunc(InBits);
     computeKnownBits(Op.getOperand(0), KnownZero, KnownOne, DemandedElts,
                      Depth + 1);
 
-    // Note if the sign bit is known to be zero or one.
-    bool SignBitKnownZero = KnownZero.isNegative();
-    bool SignBitKnownOne  = KnownOne.isNegative();
-
-    KnownZero = KnownZero.zext(BitWidth);
-    KnownOne = KnownOne.zext(BitWidth);
-
-    // If the sign bit is known zero or one, the top bits match.
-    if (SignBitKnownZero)
-      KnownZero |= NewBits;
-    else if (SignBitKnownOne)
-      KnownOne  |= NewBits;
+    // If the sign bit is known to be zero or one, then sext will extend
+    // it to the top bits, else it will just zext.
+    KnownZero = KnownZero.sext(BitWidth);
+    KnownOne = KnownOne.sext(BitWidth);
     break;
   }
   case ISD::ANY_EXTEND: {