void setIsUse(bool Val = true) { setIsDef(!Val); }
+ /// Change a def to a use, or a use to a def.
void setIsDef(bool Val = true);
void setImplicit(bool Val = true) {
//===--------------------------------------------------------------------===//
/// Returns true if this operand is identical to the specified operand except
- /// for liveness related flags (isKill, isUndef and isDead).
+ /// for liveness related flags (isKill, isUndef and isDead). Note that this
+ /// should stay in sync with the hash_value overload below.
bool isIdenticalTo(const MachineOperand &Other) const;
/// \brief MachineOperand hash_value overload.
///
/// Note that this includes the same information in the hash that
/// isIdenticalTo uses for comparison. It is thus suited for use in hash
- /// tables which use that function for equality comparisons only.
+ /// tables which use that function for equality comparisons only. This must
+ /// stay exactly in sync with isIdenticalTo above.
friend hash_code hash_value(const MachineOperand &MO);
/// ChangeToImmediate - Replace this operand with a new immediate operand of
bool isKill = false, bool isDead = false,
bool isUndef = false,
bool isEarlyClobber = false,
- unsigned SubReg = 0,
- bool isDebug = false,
+ unsigned SubReg = 0, bool isDebug = false,
bool isInternalRead = false) {
assert(!(isDead && !isDef) && "Dead flag on non-def");
assert(!(isKill && isDef) && "Kill flag on def");
Op.setTargetFlags(TargetFlags);
return Op;
}
- static MachineOperand CreateJTI(unsigned Idx,
- unsigned char TargetFlags = 0) {
+ static MachineOperand CreateJTI(unsigned Idx, unsigned char TargetFlags = 0) {
MachineOperand Op(MachineOperand::MO_JumpTableIndex);
Op.setIndex(Idx);
Op.setTargetFlags(TargetFlags);
return Op;
}
/// CreateRegMask - Creates a register mask operand referencing Mask. The
- /// operand does not take ownership of the memory referenced by Mask, it must
- /// remain valid for the lifetime of the operand.
+ /// operand does not take ownership of the memory referenced by Mask, it
+ /// must remain valid for the lifetime of the operand.
///
- /// A RegMask operand represents a set of non-clobbered physical registers on
- /// an instruction that clobbers many registers, typically a call. The bit
- /// mask has a bit set for each physreg that is preserved by this
+ /// A RegMask operand represents a set of non-clobbered physical registers
+ /// on an instruction that clobbers many registers, typically a call. The
+ /// bit mask has a bit set for each physreg that is preserved by this
/// instruction, as described in the documentation for
/// TargetRegisterInfo::getCallPreservedMask().
///
friend class MachineInstr;
friend class MachineRegisterInfo;
+
private:
+ // If this operand is currently a register operand, and if this is in a
+ // function, deregister the operand from the register's use/def list.
void removeRegFromUses();
/// Artificial kinds for DenseMap usage.
// Methods for handling register use/def lists.
//===--------------------------------------------------------------------===//
- /// isOnRegUseList - Return true if this operand is on a register use/def list
- /// or false if not. This can only be called for register operands that are
- /// part of a machine instruction.
+ /// isOnRegUseList - Return true if this operand is on a register use/def
+ /// list or false if not. This can only be called for register operands
+ /// that are part of a machine instruction.
bool isOnRegUseList() const {
assert(isReg() && "Can only add reg operand to use lists");
return Contents.Reg.Prev != nullptr;
}
};
-inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand& MO) {
+inline raw_ostream &operator<<(raw_ostream &OS, const MachineOperand &MO) {
MO.print(OS, nullptr);
return OS;
}
- // See friend declaration above. This additional declaration is required in
- // order to compile LLVM with IBM xlC compiler.
- hash_code hash_value(const MachineOperand &MO);
-} // End llvm namespace
+// See friend declaration above. This additional declaration is required in
+// order to compile LLVM with IBM xlC compiler.
+hash_code hash_value(const MachineOperand &MO);
+} // namespace llvm
#endif
setReg(Reg);
}
-/// Change a def to a use, or a use to a def.
void MachineOperand::setIsDef(bool Val) {
assert(isReg() && "Wrong MachineOperand accessor");
assert((!Val || !isDebug()) && "Marking a debug operation as def");
IsDef = Val;
}
-// If this operand is currently a register operand, and if this is in a
-// function, deregister the operand from the register's use/def list.
void MachineOperand::removeRegFromUses() {
if (!isReg() || !isOnRegUseList())
return;
}
}
-/// ChangeToImmediate - Replace this operand with a new immediate operand of
-/// the specified value. If an operand is known to be an immediate already,
-/// the setImm method should be used.
void MachineOperand::ChangeToImmediate(int64_t ImmVal) {
assert((!isReg() || !isTied()) && "Cannot change a tied operand into an imm");
setTargetFlags(TargetFlags);
}
-/// ChangeToRegister - Replace this operand with a new register operand of
-/// the specified value. If an operand is known to be an register already,
-/// the setReg method should be used.
void MachineOperand::ChangeToRegister(unsigned Reg, bool isDef, bool isImp,
bool isKill, bool isDead, bool isUndef,
bool isDebug) {
RegInfo->addRegOperandToUseList(this);
}
-/// isIdenticalTo - Return true if this operand is identical to the specified
-/// operand. Note that this should stay in sync with the hash_value overload
-/// below.
bool MachineOperand::isIdenticalTo(const MachineOperand &Other) const {
if (getType() != Other.getType() ||
getTargetFlags() != Other.getTargetFlags())
// MachineMemOperand Implementation
//===----------------------------------------------------------------------===//
-/// getAddrSpace - Return the LLVM IR address space number that this pointer
-/// points into.
unsigned MachinePointerInfo::getAddrSpace() const {
if (V.isNull()) return 0;
return cast<PointerType>(V.get<const Value*>()->getType())->getAddressSpace();
}
-/// isDereferenceable - Return true if V is always dereferenceable for
-/// Offset + Size byte.
bool MachinePointerInfo::isDereferenceable(unsigned Size, LLVMContext &C,
const DataLayout &DL) const {
if (!V.is<const Value*>())
BasePtr, 1, APInt(DL.getPointerSizeInBits(), Offset + Size), DL);
}
-/// getConstantPool - Return a MachinePointerInfo record that refers to the
-/// constant pool.
MachinePointerInfo MachinePointerInfo::getConstantPool(MachineFunction &MF) {
return MachinePointerInfo(MF.getPSVManager().getConstantPool());
}
-/// getFixedStack - Return a MachinePointerInfo record that refers to the
-/// the specified FrameIndex.
MachinePointerInfo MachinePointerInfo::getFixedStack(MachineFunction &MF,
int FI, int64_t Offset) {
return MachinePointerInfo(MF.getPSVManager().getFixedStack(FI), Offset);
assert(getFailureOrdering() == FailureOrdering && "Value truncated");
}
-/// Profile - Gather unique data for the object.
-///
void MachineMemOperand::Profile(FoldingSetNodeID &ID) const {
ID.AddInteger(getOffset());
ID.AddInteger(Size);
}
}
-/// getAlignment - Return the minimum known alignment in bytes of the
-/// actual memory reference.
uint64_t MachineMemOperand::getAlignment() const {
return MinAlign(getBaseAlignment(), getOffset());
}
projects / llvm / commitdiff