[Hexagon] Generate multiply-high instruction in isel

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@305302 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/Hexagon/HexagonPatterns.td b/lib/Target/Hexagon/HexagonPatterns.td
index f269b74fc447c76f60fadfb662ebfd04820a9db3..a8c5658337b41034d48b06608cc8f98454995ae9 100644 (file)
--- a/lib/Target/Hexagon/HexagonPatterns.td
+++ b/lib/Target/Hexagon/HexagonPatterns.td
@@ -401,6 +401,11 @@ def Aext64: PatFrag<(ops node:$Rs), (i64 (anyext node:$Rs))>;
 def Zext64: PatFrag<(ops node:$Rs), (i64 (zext node:$Rs))>;
 def Sext64: PatLeaf<(i64 Usxtw:$Rs)>;
 
+def: Pat<(i32 (trunc (sra (mul Sext64:$Rs, Sext64:$Rt), (i32 32)))),
+         (M2_mpy_up (LoReg Sext64:$Rs), (LoReg Sext64:$Rt))>;
+def: Pat<(i32 (trunc (srl (mul Sext64:$Rs, Sext64:$Rt), (i32 32)))),
+         (M2_mpy_up (LoReg Sext64:$Rs), (LoReg Sext64:$Rt))>;
+
 def: Pat<(mul (Aext64 I32:$Rs), (Aext64 I32:$Rt)),
          (M2_dpmpyuu_s0 I32:$Rs, I32:$Rt)>;
 

diff --git a/test/CodeGen/Hexagon/mulh.ll b/test/CodeGen/Hexagon/mulh.ll
new file mode 100644 (file)
index 0000000..0442e28
--- /dev/null
+++ b/test/CodeGen/Hexagon/mulh.ll
@@ -0,0 +1,27 @@
+; RUN: llc -march=hexagon < %s | FileCheck %s
+
+target triple = "hexagon"
+
+; CHECK-LABEL: danny:
+; CHECK: r{{[0-9]+}} = mpy(r0,r1)  
+define i32 @danny(i32 %a0, i32 %a1) {
+b2:
+  %v3 = sext i32 %a0 to i64
+  %v4 = sext i32 %a1 to i64
+  %v5 = mul nsw i64 %v3, %v4
+  %v6 = ashr i64 %v5, 32
+  %v7 = trunc i64 %v6 to i32
+  ret i32 %v7
+}
+
+; CHECK-LABEL: sammy:
+; CHECK: r{{[0-9]+}} = mpy(r0,r1)
+define i32 @sammy(i32 %a0, i32 %a1) {
+b2:
+  %v3 = sext i32 %a0 to i64
+  %v4 = sext i32 %a1 to i64
+  %v5 = mul nsw i64 %v3, %v4
+  %v6 = lshr i64 %v5, 32
+  %v7 = trunc i64 %v6 to i32
+  ret i32 %v7
+}