2007-06-28 Hans Boehm <Hans.Boehm@hp.com>

	* Makefile.am: Use -no-undefined for libgc.
	* Makefile.in: Regenerate.
	* Makefile.direct: Document USE_PROC_FOR_LIBRARIES.
	* dyn_load.c (GC_register_map_entries): Rename prot_buf to prot
	consistently.
	* misc.c: Fix some WARN calls.  Move GC_is_initialized setting and
	GC_thr_init() call.
	* os_dep.c: Consistently use WARN where appropriate.
	* thread_local_alloc.c: Revert change to GC_WIN32_THREADS test.  Instead
	remove inappropriate pthread.h include.
	* doc/README.linux: Remove some anachronisms.
	* libatomic_ops-1.2/src/atomic_ops/sysdeps/gcc/powerpc.h (AO_load_acquire): Add
	64-bit version.

diff --git a/ChangeLog b/ChangeLog
index d5a1800bd6686b825efed2c798b76c62d569eb0d..9ff108788d95efd03779497d21cab024aadad119 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,7 @@
+2007-06-26 Hans Boehm <Hans.Boehm@hp.com> (really Luca Barbato)
+        * src/atomic_ops/sysdeps/gcc/powerpc.h (AO_load_acquire): Add
+       64-bit version.
+
 2007-06-13 Hans Boehm <Hans.Boehm@hp.com>
         * src/atomic_ops.h: include stddef.h
 

diff --git a/src/atomic_ops/sysdeps/gcc/powerpc.h b/src/atomic_ops/sysdeps/gcc/powerpc.h
index 01498721f580ff1973689b45019c1904f96a965c..a014a7b5248e472f0e468b3c8ad527eb1de6344f 100644 (file)
--- a/src/atomic_ops/sysdeps/gcc/powerpc.h
+++ b/src/atomic_ops/sysdeps/gcc/powerpc.h
@@ -63,6 +63,8 @@ AO_lwsync()
 /* seems to be that a data dependent branch followed by an isync is    */
 /* cheaper.  And the documentation is fairly explicit that this also   */
 /* has acquire semantics.                                              */
+/* ppc64 uses ld not lwz */
+#if defined(__powerpc64__) || defined(__ppc64__) || defined(__64BIT__)
 AO_INLINE AO_t
 AO_load_acquire(volatile AO_t *addr)
 {
@@ -72,7 +74,7 @@ AO_load_acquire(volatile AO_t *addr)
   /* registers.  I always got "impossible constraint" when I   */
   /* tried the "y" constraint.                                 */
   __asm__ __volatile__ (
-    "lwz %0,%1\n"
+    "ld %0,%1\n"
     "cmpw cr7,%0,%0\n"
     "bne- cr7,1f\n"
     "1: isync\n"
@@ -80,7 +82,25 @@ AO_load_acquire(volatile AO_t *addr)
     : "m"(*addr) : "memory", "cc");
   return result;
 }
+#else
+AO_INLINE AO_t
+AO_load_acquire(volatile AO_t *addr)
+{
+  AO_t result;
 
+  /* FIXME: We should get gcc to allocate one of the condition */
+  /* registers.  I always got "impossible constraint" when I   */
+  /* tried the "y" constraint.                                 */
+  __asm__ __volatile__ (
+    "lwz %0,%1\n"
+    "cmpw cr7,%0,%0\n"
+    "bne- cr7,1f\n"
+    "1: isync\n"
+    : "=r" (result)
+    : "m"(*addr) : "memory", "cc");
+  return result;
+}
+#endif
 #define AO_HAVE_load_acquire
 
 /* We explicitly specify store_release, since it relies        */