2009-05-27 Hans Boehm <Hans.Boehm@hp.com> (Really Ivan Maidanski)

	(diff87_cvs, resembling diff29, diff68, diff78 partly)
	* doc/README.txt: Remove outdated info about Windows support.
	* src/atomic_ops/generalize.h (AO_nop_full): Replace
	K&R-style function definition with ANSI C one.
	* src/atomic_ops/sysdeps/armcc/arm_v6.h (AO_nop_full): Ditto.
	* src/atomic_ops/sysdeps/gcc/alpha.h (AO_nop_full, AO_nop_write):
	Ditto.
	* src/atomic_ops/sysdeps/gcc/arm.h (AO_nop_full): Ditto.
	* src/atomic_ops/sysdeps/gcc/ia64.h (AO_nop_full): Ditto.
	* src/atomic_ops/sysdeps/gcc/mips.h (AO_nop_full): Ditto.
	* src/atomic_ops/sysdeps/gcc/powerpc.h (AO_nop_full, AO_lwsync): Ditto.
	* src/atomic_ops/sysdeps/gcc/x86.h (AO_nop_full): Ditto.
	* src/atomic_ops/sysdeps/generic_pthread.h (AO_nop_full): Ditto.
	* src/atomic_ops/sysdeps/hpc/ia64.h (AO_nop_full): Ditto.
	* src/atomic_ops/sysdeps/icc/ia64.h (AO_nop_full): Ditto.
	* src/atomic_ops/sysdeps/ordered.h (AO_nop_full): Ditto.
	* src/atomic_ops/sysdeps/ordered_except_wr.h (AO_nop_write): Ditto.
	* src/atomic_ops/sysdeps/read_ordered.h (AO_nop_read): Ditto.
	* src/atomic_ops/sysdeps/test_and_set_t_is_ao_t.h (AO_TS_val): Fix
	comment.

diff --git a/ChangeLog b/ChangeLog
index 68d7d9fde5c7764917c72429c9d95512b2d2d548..bf85ced52937a9817dbed1217a4da51a5a606dd6 100644 (file)
--- a/ChangeLog
+++ b/ChangeLog
@@ -1,3 +1,25 @@
+2009-05-27 Hans Boehm <Hans.Boehm@hp.com> (Really Ivan Maidanski)
+       (diff87_cvs, resembling diff29, diff68, diff78 partly)
+       * doc/README.txt: Remove outdated info about Windows support.
+       * src/atomic_ops/generalize.h (AO_nop_full): Replace
+       K&R-style function definition with ANSI C one.
+       * src/atomic_ops/sysdeps/armcc/arm_v6.h (AO_nop_full): Ditto.
+       * src/atomic_ops/sysdeps/gcc/alpha.h (AO_nop_full, AO_nop_write):
+       Ditto.
+       * src/atomic_ops/sysdeps/gcc/arm.h (AO_nop_full): Ditto.
+       * src/atomic_ops/sysdeps/gcc/ia64.h (AO_nop_full): Ditto.
+       * src/atomic_ops/sysdeps/gcc/mips.h (AO_nop_full): Ditto.
+       * src/atomic_ops/sysdeps/gcc/powerpc.h (AO_nop_full, AO_lwsync): Ditto.
+       * src/atomic_ops/sysdeps/gcc/x86.h (AO_nop_full): Ditto.
+       * src/atomic_ops/sysdeps/generic_pthread.h (AO_nop_full): Ditto.
+       * src/atomic_ops/sysdeps/hpc/ia64.h (AO_nop_full): Ditto.
+       * src/atomic_ops/sysdeps/icc/ia64.h (AO_nop_full): Ditto.
+       * src/atomic_ops/sysdeps/ordered.h (AO_nop_full): Ditto.
+       * src/atomic_ops/sysdeps/ordered_except_wr.h (AO_nop_write): Ditto.
+       * src/atomic_ops/sysdeps/read_ordered.h (AO_nop_read): Ditto.
+       * src/atomic_ops/sysdeps/test_and_set_t_is_ao_t.h (AO_TS_val): Fix
+       comment.
+       
 2009-02-24 Hans Boehm <Hans.Boehm@hp.com> (Really primarily Earl Chew)
        * src/atomic_ops/sysdeps/gcc/powerpc.h: Add index,
        update modifiers to asms, refine clobbers to "cr0", use

diff --git a/doc/README.txt b/doc/README.txt
index 12c5856f2c8d45ad4963ce15a436dcc572ea0d1d..29c8597693a75e4670596d49fa567be9e4fee556 100644 (file)
--- a/doc/README.txt
+++ b/doc/README.txt
@@ -230,15 +230,11 @@ Platform notes:
 
 All X86: We quietly assume 486 or better.
 
-Windows:
-Currently AO_REQUIRE_CAS is not supported.
-
 Microsoft compilers:
 Define AO_ASSUME_WINDOWS98 to get access to hardware compare-and-swap
 functionality.  This relies on the InterlockedCompareExchange() function
 which was apparently not supported in Windows95.  (There may be a better
-way to get access to this.)  Currently only X86(32 bit) is supported for
-Windows.
+way to get access to this.)
 
 Gcc on x86:
 Define AO_USE_PENTIUM4_INSTRS to use the Pentium 4 mfence instruction.

diff --git a/src/atomic_ops/generalize.h b/src/atomic_ops/generalize.h
index 8d093365275640c72229506000dcf103252f21ef..45950c7ab5e30c34d581fb3bda3899c46f3714d0 100644 (file)
--- a/src/atomic_ops/generalize.h
+++ b/src/atomic_ops/generalize.h
@@ -149,7 +149,7 @@
 
 #if defined(AO_HAVE_test_and_set_full) && !defined(AO_HAVE_nop_full)
    AO_INLINE void
-   AO_nop_full()
+   AO_nop_full(void)
    {
      AO_TS_t dummy = AO_TS_INITIALIZER;
      AO_test_and_set_full(&dummy);

diff --git a/src/atomic_ops/sysdeps/armcc/arm_v6.h b/src/atomic_ops/sysdeps/armcc/arm_v6.h
index 469b99479fb30283795d54a1280e4fa05542eeff..86376eb2b9bc7e89ad94466c6aefca8a207d63fc 100644 (file)
--- a/src/atomic_ops/sysdeps/armcc/arm_v6.h
+++ b/src/atomic_ops/sysdeps/armcc/arm_v6.h
@@ -41,7 +41,7 @@ Dont use with ARM instruction sets lower than v6
 */
 
 AO_INLINE void
-AO_nop_full()
+AO_nop_full(void)
 {
 #ifndef AO_UNIPROCESSOR
        unsigned int dest=0;

diff --git a/src/atomic_ops/sysdeps/gcc/alpha.h b/src/atomic_ops/sysdeps/gcc/alpha.h
index 90c060c115eed165b5724ec3ff8c1537d6d60465..4e26d47c5000f4c8c56c3738c3a300e61de3fa94 100644 (file)
--- a/src/atomic_ops/sysdeps/gcc/alpha.h
+++ b/src/atomic_ops/sysdeps/gcc/alpha.h
@@ -23,7 +23,7 @@
        /* Data dependence does not imply read ordering.        */
 
 AO_INLINE void
-AO_nop_full()
+AO_nop_full(void)
 {
   __asm__ __volatile__("mb" : : : "memory");
 }
@@ -31,7 +31,7 @@ AO_nop_full()
 #define AO_HAVE_nop_full
 
 AO_INLINE void
-AO_nop_write()
+AO_nop_write(void)
 {
   __asm__ __volatile__("wmb" : : : "memory");
 }

diff --git a/src/atomic_ops/sysdeps/gcc/arm.h b/src/atomic_ops/sysdeps/gcc/arm.h
index b9d5d9edc9620606edf4d939b8a75dde9eaf7c58..8a9826bd3505c3bd047d0b189b62bee420e69870 100644 (file)
--- a/src/atomic_ops/sysdeps/gcc/arm.h
+++ b/src/atomic_ops/sysdeps/gcc/arm.h
@@ -38,7 +38,7 @@
 #include "../standard_ao_double_t.h"
 
 AO_INLINE void
-AO_nop_full()
+AO_nop_full(void)
 {
 #ifndef AO_UNIPROCESSOR
        /* issue an data memory barrier (keeps ordering of memory transactions  */

diff --git a/src/atomic_ops/sysdeps/gcc/ia64.h b/src/atomic_ops/sysdeps/gcc/ia64.h
index 119b9ed19d6527c092eb2e0417caceb067b7e36e..bd93f7057dd4d7e249aec887d21945604ee2f918 100644 (file)
--- a/src/atomic_ops/sysdeps/gcc/ia64.h
+++ b/src/atomic_ops/sysdeps/gcc/ia64.h
@@ -55,7 +55,7 @@
 #endif
 
 AO_INLINE void
-AO_nop_full()
+AO_nop_full(void)
 {
   __asm__ __volatile__("mf" : : : "memory");
 }

diff --git a/src/atomic_ops/sysdeps/gcc/mips.h b/src/atomic_ops/sysdeps/gcc/mips.h
index 45031f177fe9d0299f0a4fdae8de0116e137adb3..c6fd2c1b2cfedd0351fe8a4e27646166abe3e15d 100644 (file)
--- a/src/atomic_ops/sysdeps/gcc/mips.h
+++ b/src/atomic_ops/sysdeps/gcc/mips.h
@@ -27,7 +27,7 @@
 #define AO_NO_DD_ORDERING\r
 \r
 AO_INLINE void\r
-AO_nop_full()\r
+AO_nop_full(void)\r
 {\r
   __asm__ __volatile__(\r
       "       .set push           \n"\r

diff --git a/src/atomic_ops/sysdeps/gcc/powerpc.h b/src/atomic_ops/sysdeps/gcc/powerpc.h
index 28d8986c36b6f2db51439b1614b9d395addd22ec..49ab63c69f16bb5f788189ab430ffccea4936c29 100644 (file)
--- a/src/atomic_ops/sysdeps/gcc/powerpc.h
+++ b/src/atomic_ops/sysdeps/gcc/powerpc.h
@@ -37,7 +37,7 @@
        /* may really be what we want, at least in the 32-bit case.     */
 
 AO_INLINE void
-AO_nop_full()
+AO_nop_full(void)
 {
   __asm__ __volatile__("sync" : : : "memory");
 }
@@ -46,7 +46,7 @@ AO_nop_full()
 
 /* lwsync apparently works for everything but a StoreLoad barrier.     */
 AO_INLINE void
-AO_lwsync()
+AO_lwsync(void)
 {
 #ifdef __NO_LWSYNC__
   __asm__ __volatile__("sync" : : : "memory");

diff --git a/src/atomic_ops/sysdeps/gcc/x86.h b/src/atomic_ops/sysdeps/gcc/x86.h
index 662df3f129c6b9102080637223debdf8773a8d66..488cd20a444fc4c1fcff126e5df04296f6ef6cc9 100644 (file)
--- a/src/atomic_ops/sysdeps/gcc/x86.h
+++ b/src/atomic_ops/sysdeps/gcc/x86.h
@@ -38,7 +38,7 @@
 
 #if defined(AO_USE_PENTIUM4_INSTRS)
 AO_INLINE void
-AO_nop_full()
+AO_nop_full(void)
 {
   __asm__ __volatile__("mfence" : : : "memory");
 }

diff --git a/src/atomic_ops/sysdeps/generic_pthread.h b/src/atomic_ops/sysdeps/generic_pthread.h
index 519dbf8ca584e5fb4bbcac94da99cde681d0aa98..b38367fe42224fbb4afaeeb02715a46ec9864f71 100644 (file)
--- a/src/atomic_ops/sysdeps/generic_pthread.h
+++ b/src/atomic_ops/sysdeps/generic_pthread.h
@@ -38,7 +38,7 @@
 extern pthread_mutex_t AO_pt_lock;
 
 AO_INLINE void
-AO_nop_full()
+AO_nop_full(void)
 {
   pthread_mutex_lock(&AO_pt_lock);
   pthread_mutex_unlock(&AO_pt_lock);

diff --git a/src/atomic_ops/sysdeps/hpc/ia64.h b/src/atomic_ops/sysdeps/hpc/ia64.h
index a7a507113b41b4c6b8f029b454d15da5e443c392..3fbcc4d57736d4715f3f3f93f278b412b6f0097d 100644 (file)
--- a/src/atomic_ops/sysdeps/hpc/ia64.h
+++ b/src/atomic_ops/sysdeps/hpc/ia64.h
@@ -43,7 +43,7 @@
 #endif
 
 AO_INLINE void
-AO_nop_full()
+AO_nop_full(void)
 {
   _Asm_mf();
 }

diff --git a/src/atomic_ops/sysdeps/icc/ia64.h b/src/atomic_ops/sysdeps/icc/ia64.h
index 7eebe27fff3ef1a8325f9f9bfa0e343daa1b0883..0278f8bb3a0f2223e528a2de6dde26c72bdc6004 100644 (file)
--- a/src/atomic_ops/sysdeps/icc/ia64.h
+++ b/src/atomic_ops/sysdeps/icc/ia64.h
@@ -98,7 +98,7 @@ AO_int_store_release(volatile unsigned int *p, unsigned int val)
 #define AO_HAVE_int_store_release
 
 AO_INLINE void
-AO_nop_full()
+AO_nop_full(void)
 {
   __mf();
 }

diff --git a/src/atomic_ops/sysdeps/ordered.h b/src/atomic_ops/sysdeps/ordered.h
index 2bcd8d8a14806ba5b7af1a869acb1b49c4e1309a..cdd2d8e157d6b8d604689ffa56ca1f8fae1bcbc2 100644 (file)
--- a/src/atomic_ops/sysdeps/ordered.h
+++ b/src/atomic_ops/sysdeps/ordered.h
@@ -28,7 +28,7 @@
 #include "ordered_except_wr.h"
 
 AO_INLINE void
-AO_nop_full()
+AO_nop_full(void)
 {
   AO_compiler_barrier();
 }

diff --git a/src/atomic_ops/sysdeps/ordered_except_wr.h b/src/atomic_ops/sysdeps/ordered_except_wr.h
index 4f2930314bd4d4a44202d763f1b876ac9b0b6668..3e700b143a1dd1f8752ee475ada4b06142eaa131 100644 (file)
--- a/src/atomic_ops/sysdeps/ordered_except_wr.h
+++ b/src/atomic_ops/sysdeps/ordered_except_wr.h
@@ -30,7 +30,7 @@
 #include "read_ordered.h"
 
 AO_INLINE void
-AO_nop_write()
+AO_nop_write(void)
 {
   AO_compiler_barrier();
   /* sfence according to Intel docs.  Pentium 3 and up.        */

diff --git a/src/atomic_ops/sysdeps/read_ordered.h b/src/atomic_ops/sysdeps/read_ordered.h
index ddf0988c6770f2b7fa2d5ffda6e0e9e72c117df8..922f5ea507dcc5b28cfbffb3f28daa59d9783670 100644 (file)
--- a/src/atomic_ops/sysdeps/read_ordered.h
+++ b/src/atomic_ops/sysdeps/read_ordered.h
@@ -28,7 +28,7 @@
  */
 
 AO_INLINE void
-AO_nop_read()
+AO_nop_read(void)
 {
   AO_compiler_barrier();
 }

diff --git a/src/atomic_ops/sysdeps/test_and_set_t_is_ao_t.h b/src/atomic_ops/sysdeps/test_and_set_t_is_ao_t.h
index 663bccfe0fb27d1f1fc8ef9b575cced37f75d364..53c2c5c4b95f1e4dc4c0ae6c9f1e8538493ac723 100644 (file)
--- a/src/atomic_ops/sysdeps/test_and_set_t_is_ao_t.h
+++ b/src/atomic_ops/sysdeps/test_and_set_t_is_ao_t.h
@@ -23,7 +23,7 @@
 /*
  * These are common definitions for architectures on which test_and_set
  * operates on pointer-sized quantities, the "clear" value contains
- * all zeroes, and the "set" value contains all ones.
+ * all zeroes, and the "set" value contains only one lowest bit set.
  * This can be used if test_and_set is synthesized from compare_and_swap.
  */
 typedef enum {AO_TS_clear = 0, AO_TS_set = 1} AO_TS_val;