[PPC64] Add vector pack/unpack support from ISA 2.07

This patch adds support for the following new instructions in the
Power ISA 2.07:

  vpksdss
  vpksdus
  vpkudus
  vpkudum
  vupkhsw
  vupklsw

These instructions are available through the vec_packs, vec_packsu,
vec_unpackh, and vec_unpackl built-in interfaces.  These are
lane-sensitive instructions, so the built-ins have different
implementations for big- and little-endian, and the instructions must
be marked as killing the vector swap optimization for now.

The first three instructions perform saturating pack operations.  The
fourth performs a modulo pack operation, which means it can be
represented with a vector shuffle, and conversely the appropriate
vector shuffles may cause this instruction to be generated.  The other
instructions are only generated via built-in support for now.

I noticed during patch preparation that the macro __VSX__ was not
previously predefined when the power8-vector or direct-move features
are requested.  This is an error, and I've corrected that here as
well.

Appropriate tests have been added.

There is a companion patch to llvm for the rest of this support.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@237500 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/clang/Basic/BuiltinsPPC.def b/include/clang/Basic/BuiltinsPPC.def
index 09968182b09cc43ceecaadd39414b536f938dcc8..a916289469bb27dbf54f4a9a8bf2ef25cc032ac5 100644 (file)
--- a/include/clang/Basic/BuiltinsPPC.def
+++ b/include/clang/Basic/BuiltinsPPC.def
@@ -103,6 +103,10 @@ BUILTIN(__builtin_altivec_vpkuwus, "V8UsV4UiV4Ui", "")
 BUILTIN(__builtin_altivec_vpkswss, "V8SsV4SiV4Si", "")
 BUILTIN(__builtin_altivec_vpkshus, "V16UcV8SsV8Ss", "")
 BUILTIN(__builtin_altivec_vpkswus, "V8UsV4SiV4Si", "")
+BUILTIN(__builtin_altivec_vpksdss, "V4SiV2SLLiV2SLLi", "")
+BUILTIN(__builtin_altivec_vpksdus, "V4UiV2SLLiV2SLLi", "")
+BUILTIN(__builtin_altivec_vpkudus, "V4UiV2ULLiV2ULLi", "")
+BUILTIN(__builtin_altivec_vpkudum, "V4UiV2ULLiV2ULLi", "")
 
 BUILTIN(__builtin_altivec_vperm_4si, "V4iV4iV4iV16Uc", "")
 
@@ -194,10 +198,12 @@ BUILTIN(__builtin_altivec_vrfiz, "V4fV4f", "")
 BUILTIN(__builtin_altivec_vupkhsb, "V8sV16c", "")
 BUILTIN(__builtin_altivec_vupkhpx, "V4UiV8s", "")
 BUILTIN(__builtin_altivec_vupkhsh, "V4iV8s", "")
+BUILTIN(__builtin_altivec_vupkhsw, "V2LLiV4i", "")
 
 BUILTIN(__builtin_altivec_vupklsb, "V8sV16c", "")
 BUILTIN(__builtin_altivec_vupklpx, "V4UiV8s", "")
 BUILTIN(__builtin_altivec_vupklsh, "V4iV8s", "")
+BUILTIN(__builtin_altivec_vupklsw, "V2LLiV4i", "")
 
 BUILTIN(__builtin_altivec_vcmpbfp_p, "iiV4fV4f", "")
 

diff --git a/lib/Basic/Targets.cpp b/lib/Basic/Targets.cpp
index 86470b1bba23816f8be33f3792b3122377f064c8..33382ce67b4066cb5838deebd3c7b97d3d08a062 100644 (file)
--- a/lib/Basic/Targets.cpp
+++ b/lib/Basic/Targets.cpp
@@ -1028,6 +1028,7 @@ bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
 
     if (Feature == "power8-vector") {
       HasP8Vector = true;
+      HasVSX = true;
       continue;
     }
 
@@ -1038,6 +1039,7 @@ bool PPCTargetInfo::handleTargetFeatures(std::vector<std::string> &Features,
 
     if (Feature == "direct-move") {
       HasDirectMove = true;
+      HasVSX = true;
       continue;
     }
 

diff --git a/lib/Headers/altivec.h b/lib/Headers/altivec.h
index 252bf36c925bac513bbacbe47fc3d0f96d4d46d1..2bce9e765326908043ac1ba4b9b6247f0b4f89d1 100644 (file)
--- a/lib/Headers/altivec.h
+++ b/lib/Headers/altivec.h
@@ -73,6 +73,18 @@ vec_perm(vector bool int __a, vector bool int __b, vector unsigned char __c);
 static vector float __ATTRS_o_ai
 vec_perm(vector float __a, vector float __b, vector unsigned char __c);
 
+#ifdef __VSX__
+static vector long long __ATTRS_o_ai
+vec_perm(vector long long __a, vector long long __b, vector unsigned char __c);
+
+static vector unsigned long long __ATTRS_o_ai
+vec_perm(vector unsigned long long __a, vector unsigned long long __b,
+         vector unsigned char __c);
+
+static vector double __ATTRS_o_ai
+vec_perm(vector double __a, vector double __b, vector unsigned char __c);
+#endif
+
 static vector unsigned char __ATTRS_o_ai
 vec_xor(vector unsigned char __a, vector unsigned char __b);
 
@@ -4626,6 +4638,58 @@ vec_vpkuwum(vector bool int __a, vector bool int __b)
 #endif
 }
 
+/* vec_vpkudum */
+
+#ifdef __POWER8_VECTOR__
+#define __builtin_altivec_vpkudum vec_vpkudum
+
+static vector int __ATTRS_o_ai
+vec_vpkudum(vector long long __a, vector long long __b)
+{
+#ifdef __LITTLE_ENDIAN__
+  return (vector int)vec_perm(__a, __b, (vector unsigned char)
+    (0x00, 0x01, 0x02, 0x03, 0x08, 0x09, 0x0A, 0x0B,
+     0x10, 0x11, 0x12, 0x13, 0x18, 0x19, 0x1A, 0x1B));
+#else
+  return (vector int)vec_perm(__a, __b, (vector unsigned char)
+    (0x04, 0x05, 0x06, 0x07, 0x0C, 0x0D, 0x0E, 0x0F,
+     0x14, 0x15, 0x16, 0x17, 0x1C, 0x1D, 0x1E, 0x1F));
+#endif
+}
+
+static vector unsigned int __ATTRS_o_ai
+vec_vpkudum(vector unsigned long long __a, vector unsigned long long __b)
+{
+#ifdef __LITTLE_ENDIAN__
+  return (vector unsigned int)vec_perm(__a, __b, (vector unsigned char)
+    (0x00, 0x01, 0x02, 0x03, 0x08, 0x09, 0x0A, 0x0B,
+     0x10, 0x11, 0x12, 0x13, 0x18, 0x19, 0x1A, 0x1B));
+#else
+  return (vector unsigned int)vec_perm(__a, __b, (vector unsigned char)
+    (0x04, 0x05, 0x06, 0x07, 0x0C, 0x0D, 0x0E, 0x0F,
+     0x14, 0x15, 0x16, 0x17, 0x1C, 0x1D, 0x1E, 0x1F));
+#endif
+}
+
+static vector bool int __ATTRS_o_ai
+vec_vpkudum(vector bool long long __a, vector bool long long __b)
+{
+#ifdef __LITTLE_ENDIAN__
+  return (vector bool int)vec_perm((vector long long)__a,
+                                   (vector long long)__b,
+                                   (vector unsigned char)
+    (0x00, 0x01, 0x02, 0x03, 0x08, 0x09, 0x0A, 0x0B,
+     0x10, 0x11, 0x12, 0x13, 0x18, 0x19, 0x1A, 0x1B));
+#else
+  return (vector bool int)vec_perm((vector long long)__a,
+                                   (vector long long)__b,
+                                   (vector unsigned char)
+    (0x04, 0x05, 0x06, 0x07, 0x0C, 0x0D, 0x0E, 0x0F,
+     0x14, 0x15, 0x16, 0x17, 0x1C, 0x1D, 0x1E, 0x1F));
+#endif
+}
+#endif
+
 /* vec_packpx */
 
 static vector pixel __attribute__((__always_inline__))
@@ -4692,6 +4756,28 @@ vec_packs(vector unsigned int __a, vector unsigned int __b)
 #endif
 }
 
+#ifdef __POWER8_VECTOR__
+static vector int __ATTRS_o_ai
+vec_packs(vector long long __a, vector long long __b)
+{
+#ifdef __LITTLE_ENDIAN__
+  return __builtin_altivec_vpksdss(__b, __a);
+#else
+  return __builtin_altivec_vpksdss(__a, __b);
+#endif
+}
+
+static vector unsigned int __ATTRS_o_ai
+vec_packs(vector unsigned long long __a, vector unsigned long long __b)
+{
+#ifdef __LITTLE_ENDIAN__
+  return __builtin_altivec_vpkudus(__b, __a);
+#else
+  return __builtin_altivec_vpkudus(__a, __b);
+#endif
+}
+#endif
+
 /* vec_vpkshss */
 
 static vector signed char __attribute__((__always_inline__))
@@ -4704,6 +4790,20 @@ vec_vpkshss(vector short __a, vector short __b)
 #endif
 }
 
+/* vec_vpksdss */
+
+#ifdef __POWER8_VECTOR__
+static vector int __ATTRS_o_ai
+vec_vpksdss(vector long long __a, vector long long __b)
+{
+#ifdef __LITTLE_ENDIAN__
+  return __builtin_altivec_vpksdss(__b, __a);
+#else
+  return __builtin_altivec_vpksdss(__a, __b);
+#endif
+}
+#endif
+
 /* vec_vpkuhus */
 
 static vector unsigned char __attribute__((__always_inline__))
@@ -4716,6 +4816,20 @@ vec_vpkuhus(vector unsigned short __a, vector unsigned short __b)
 #endif
 }
 
+/* vec_vpkudus */
+
+#ifdef __POWER8_VECTOR__
+static vector unsigned int __attribute__((__always_inline__))
+vec_vpkudus(vector unsigned long long __a, vector unsigned long long __b)
+{
+#ifdef __LITTLE_ENDIAN__
+  return __builtin_altivec_vpkudus(__b, __a);
+#else
+  return __builtin_altivec_vpkudus(__a, __b);
+#endif
+}
+#endif
+
 /* vec_vpkswss */
 
 static vector signed short __attribute__((__always_inline__))
@@ -4782,6 +4896,28 @@ vec_packsu(vector unsigned int __a, vector unsigned int __b)
 #endif
 }
 
+#ifdef __POWER8_VECTOR__
+static vector unsigned int __ATTRS_o_ai
+vec_packsu(vector long long __a, vector long long __b)
+{
+#ifdef __LITTLE_ENDIAN__
+  return __builtin_altivec_vpksdus(__b, __a);
+#else
+  return __builtin_altivec_vpksdus(__a, __b);
+#endif
+}
+
+static vector unsigned int __ATTRS_o_ai
+vec_packsu(vector unsigned long long __a, vector unsigned long long __b)
+{
+#ifdef __LITTLE_ENDIAN__
+  return __builtin_altivec_vpkudus(__b, __a);
+#else
+  return __builtin_altivec_vpkudus(__a, __b);
+#endif
+}
+#endif
+
 /* vec_vpkshus */
 
 static vector unsigned char __ATTRS_o_ai
@@ -4826,6 +4962,20 @@ vec_vpkswus(vector unsigned int __a, vector unsigned int __b)
 #endif
 }
 
+/* vec_vpksdus */
+
+#ifdef __POWER8_VECTOR__
+static vector unsigned int __ATTRS_o_ai
+vec_vpksdus(vector long long __a, vector long long __b)
+{
+#ifdef __LITTLE_ENDIAN__
+  return __builtin_altivec_vpksdus(__b, __a);
+#else
+  return __builtin_altivec_vpksdus(__a, __b);
+#endif
+}
+#endif
+
 /* vec_perm */
 
 // The vperm instruction is defined architecturally with a big-endian bias.
@@ -8954,6 +9104,28 @@ vec_unpackh(vector pixel __a)
 #endif
 }
 
+#ifdef __POWER8_VECTOR__
+static vector long long __ATTRS_o_ai
+vec_unpackh(vector int __a)
+{
+#ifdef __LITTLE_ENDIAN__
+  return __builtin_altivec_vupklsw(__a);
+#else
+  return __builtin_altivec_vupkhsw(__a);
+#endif
+}
+
+static vector bool long long __ATTRS_o_ai
+vec_unpackh(vector bool int __a)
+{
+#ifdef __LITTLE_ENDIAN__
+  return (vector bool long long)__builtin_altivec_vupklsw((vector int)__a);
+#else
+  return (vector bool long long)__builtin_altivec_vupkhsw((vector int)__a);
+#endif
+}
+#endif
+
 /* vec_vupkhsb */
 
 static vector short __ATTRS_o_ai
@@ -9008,6 +9180,30 @@ vec_vupkhsh(vector pixel __a)
 #endif
 }
 
+/* vec_vupkhsw */
+
+#ifdef __POWER8_VECTOR__
+static vector long long __ATTRS_o_ai
+vec_vupkhsw(vector int __a)
+{
+#ifdef __LITTLE_ENDIAN__
+  return __builtin_altivec_vupklsw(__a);
+#else
+  return __builtin_altivec_vupkhsw(__a);
+#endif
+}
+
+static vector bool long long __ATTRS_o_ai
+vec_vupkhsw(vector bool int __a)
+{
+#ifdef __LITTLE_ENDIAN__
+  return (vector bool long long)__builtin_altivec_vupklsw((vector int)__a);
+#else
+  return (vector bool long long)__builtin_altivec_vupkhsw((vector int)__a);
+#endif
+}
+#endif
+
 /* vec_unpackl */
 
 static vector short __ATTRS_o_ai
@@ -9060,6 +9256,28 @@ vec_unpackl(vector pixel __a)
 #endif
 }
 
+#ifdef __POWER8_VECTOR__
+static vector long long __ATTRS_o_ai
+vec_unpackl(vector int __a)
+{
+#ifdef __LITTLE_ENDIAN__
+  return __builtin_altivec_vupkhsw(__a);
+#else
+  return __builtin_altivec_vupklsw(__a);
+#endif
+}
+
+static vector bool long long __ATTRS_o_ai
+vec_unpackl(vector bool int __a)
+{
+#ifdef __LITTLE_ENDIAN__
+  return (vector bool long long)__builtin_altivec_vupkhsw((vector int)__a);
+#else
+  return (vector bool long long)__builtin_altivec_vupklsw((vector int)__a);
+#endif
+}
+#endif
+
 /* vec_vupklsb */
 
 static vector short __ATTRS_o_ai
@@ -9114,6 +9332,30 @@ vec_vupklsh(vector pixel __a)
 #endif
 }
 
+/* vec_vupklsw */
+
+#ifdef __POWER8_VECTOR__
+static vector long long __ATTRS_o_ai
+vec_vupklsw(vector int __a)
+{
+#ifdef __LITTLE_ENDIAN__
+  return __builtin_altivec_vupkhsw(__a);
+#else
+  return __builtin_altivec_vupklsw(__a);
+#endif
+}
+
+static vector bool long long __ATTRS_o_ai
+vec_vupklsw(vector bool int __a)
+{
+#ifdef __LITTLE_ENDIAN__
+  return (vector bool long long)__builtin_altivec_vupkhsw((vector int)__a);
+#else
+  return (vector bool long long)__builtin_altivec_vupklsw((vector int)__a);
+#endif
+}
+#endif
+
 /* vec_vsx_ld */
 
 #ifdef __VSX__

diff --git a/test/CodeGen/builtins-ppc-p8vector.c b/test/CodeGen/builtins-ppc-p8vector.c
index d3391b5ab35f552b798b842e8df1fc9762cdb373..c91686c0ea7cf3b446946f09d179f9b93feffb91 100644 (file)
--- a/test/CodeGen/builtins-ppc-p8vector.c
+++ b/test/CodeGen/builtins-ppc-p8vector.c
@@ -5,6 +5,7 @@
 
 vector int vi = { -1, 2, -3, 4 };
 vector unsigned int vui = { 1, 2, 3, 4 };
+vector bool int vbi = {0, -1, -1, 0};
 vector bool long long vbll = { 1, 0 };
 vector long long vll = { 1, 2 };
 vector unsigned long long vull = { 1, 2 };
@@ -12,6 +13,7 @@ vector unsigned long long vull = { 1, 2 };
 int res_i;
 vector int res_vi;
 vector unsigned int res_vui;
+vector bool int res_vbi;
 vector long long res_vll;
 vector unsigned long long res_vull;
 vector bool long long res_vbll;
@@ -558,6 +560,28 @@ void test1() {
 // CHECK-LE: @llvm.ppc.altivec.vmuleuw
 // CHECK-PPC: error: call to 'vec_mulo' is ambiguous
 
+  /* vec_packs */
+  res_vi = vec_packs(vll, vll);
+// CHECK: @llvm.ppc.altivec.vpksdss
+// CHECK-LE: @llvm.ppc.altivec.vpksdss
+// CHECK-PPC: error: call to 'vec_packs' is ambiguous
+
+  res_vui = vec_packs(vull, vull);
+// CHECK: @llvm.ppc.altivec.vpkudus
+// CHECK-LE: @llvm.ppc.altivec.vpkudus
+// CHECK-PPC: error: call to 'vec_packs' is ambiguous
+
+  /* vec_packsu */
+  res_vui = vec_packsu(vll, vll);
+// CHECK: @llvm.ppc.altivec.vpksdus
+// CHECK-LE: @llvm.ppc.altivec.vpksdus
+// CHECK-PPC: error: call to 'vec_packsu' is ambiguous
+
+  res_vui = vec_packsu(vull, vull);
+// CHECK: @llvm.ppc.altivec.vpkudus
+// CHECK-LE: @llvm.ppc.altivec.vpkudus
+// CHECK-PPC: error: call to 'vec_packsu' is ambiguous
+
   /* vec_rl */
   res_vll = vec_rl(vll, vull);
 // CHECK: @llvm.ppc.altivec.vrld
@@ -602,4 +626,73 @@ void test1() {
 // CHECK-LE: ashr <2 x i64>
 // CHECK-PPC: error: call to 'vec_sra' is ambiguous
 
+  /* vec_unpackh */
+  res_vll = vec_unpackh(vi);
+// CHECK: llvm.ppc.altivec.vupkhsw
+// CHECK-LE: llvm.ppc.altivec.vupklsw
+// CHECK-PPC: error: call to 'vec_unpackh' is ambiguous
+
+  res_vbll = vec_unpackh(vbi);
+// CHECK: llvm.ppc.altivec.vupkhsw
+// CHECK-LE: llvm.ppc.altivec.vupklsw
+// CHECK-PPC: error: call to 'vec_unpackh' is ambiguous
+
+  /* vec_unpackl */
+  res_vll = vec_unpackl(vi);
+// CHECK: llvm.ppc.altivec.vupklsw
+// CHECK-LE: llvm.ppc.altivec.vupkhsw
+// CHECK-PPC: error: call to 'vec_unpackl' is ambiguous
+
+  res_vbll = vec_unpackl(vbi);
+// CHECK: llvm.ppc.altivec.vupklsw
+// CHECK-LE: llvm.ppc.altivec.vupkhsw
+// CHECK-PPC: error: call to 'vec_unpackl' is ambiguous
+
+  /* vec_vpksdss */
+  res_vi = vec_vpksdss(vll, vll);
+// CHECK: llvm.ppc.altivec.vpksdss
+// CHECK-LE: llvm.ppc.altivec.vpksdss
+// CHECK-PPC: warning: implicit declaration of function 'vec_vpksdss'
+
+  /* vec_vpksdus */
+  res_vui = vec_vpksdus(vll, vll);
+// CHECK: llvm.ppc.altivec.vpksdus
+// CHECK-LE: llvm.ppc.altivec.vpksdus
+// CHECK-PPC: warning: implicit declaration of function 'vec_vpksdus'
+
+  /* vec_vpkudum */
+  res_vi = vec_vpkudum(vll, vll);
+// CHECK: vperm
+// CHECK-LE: vperm
+// CHECK-PPC: warning: implicit declaration of function 'vec_vpkudum'
+
+  res_vui = vec_vpkudum(vull, vull);
+// CHECK: vperm
+// CHECK-LE: vperm
+
+  res_vui = vec_vpkudus(vull, vull);
+// CHECK: llvm.ppc.altivec.vpkudus
+// CHECK-LE: llvm.ppc.altivec.vpkudus
+// CHECK-PPC: warning: implicit declaration of function 'vec_vpkudus'
+
+  /* vec_vupkhsw */
+  res_vll = vec_vupkhsw(vi);
+// CHECK: llvm.ppc.altivec.vupkhsw
+// CHECK-LE: llvm.ppc.altivec.vupklsw
+// CHECK-PPC: warning: implicit declaration of function 'vec_vupkhsw'
+
+  res_vbll = vec_vupkhsw(vbi);
+// CHECK: llvm.ppc.altivec.vupkhsw
+// CHECK-LE: llvm.ppc.altivec.vupklsw
+
+  /* vec_vupklsw */
+  res_vll = vec_vupklsw(vi);
+// CHECK: llvm.ppc.altivec.vupklsw
+// CHECK-LE: llvm.ppc.altivec.vupkhsw
+// CHECK-PPC: warning: implicit declaration of function 'vec_vupklsw'
+
+  res_vbll = vec_vupklsw(vbi);
+// CHECK: llvm.ppc.altivec.vupklsw
+// CHECK-LE: llvm.ppc.altivec.vupkhsw
+
 }

diff --git a/test/Headers/altivec-intrin.c b/test/Headers/altivec-intrin.c
index b90c62d7afbc43c18bc41591fa72bd2cdf785c91..a732b6772d2b4c0dd9748e0d26348a977775b2da 100644 (file)
--- a/test/Headers/altivec-intrin.c
+++ b/test/Headers/altivec-intrin.c
@@ -14,5 +14,5 @@ int main()
 }
 // FIXME: As noted in ms-intrin.cpp, it would be nice if we didn't have to
 // hard-code the line number from altivec.h here.
-// expected-note@altivec.h:2418 {{deprecated here}}
-// expected-note@altivec.h:2553 {{deprecated here}}
+// expected-note@altivec.h:2430 {{deprecated here}}
+// expected-note@altivec.h:2565 {{deprecated here}}