]> granicus.if.org Git - llvm/commitdiff
AMDGPU: Register AMDGPUAlwaysInline
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 2 Jun 2017 18:02:42 +0000 (18:02 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Fri, 2 Jun 2017 18:02:42 +0000 (18:02 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@304574 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AMDGPU/AMDGPU.h
lib/Target/AMDGPU/AMDGPUAlwaysInlinePass.cpp
lib/Target/AMDGPU/AMDGPUTargetMachine.cpp

index 78ff3bbe3d1a0d0f080c8763bf74f8b63f7d2091..55d18c3f3646b3113503241c6c90cbce9494015a 100644 (file)
@@ -55,6 +55,8 @@ FunctionPass *createAMDGPUMachineCFGStructurizerPass();
 void initializeAMDGPUMachineCFGStructurizerPass(PassRegistry&);
 extern char &AMDGPUMachineCFGStructurizerID;
 
+void initializeAMDGPUAlwaysInlinePass(PassRegistry&);
+
 ModulePass *createAMDGPUAnnotateKernelFeaturesPass();
 void initializeAMDGPUAnnotateKernelFeaturesPass(PassRegistry &);
 extern char &AMDGPUAnnotateKernelFeaturesID;
index 1d03714874e284277aea2b137a4d4ac3d2dfd49c..8084d368c80f78c7bd27c68ccfc89a8f3b0ca271 100644 (file)
@@ -22,18 +22,22 @@ using namespace llvm;
 namespace {
 
 class AMDGPUAlwaysInline : public ModulePass {
-  static char ID;
-
   bool GlobalOpt;
 
 public:
-  AMDGPUAlwaysInline(bool GlobalOpt) : ModulePass(ID), GlobalOpt(GlobalOpt) { }
+  static char ID;
+
+  AMDGPUAlwaysInline(bool GlobalOpt = false) :
+    ModulePass(ID), GlobalOpt(GlobalOpt) { }
   bool runOnModule(Module &M) override;
   StringRef getPassName() const override { return "AMDGPU Always Inline Pass"; }
 };
 
 } // End anonymous namespace
 
+INITIALIZE_PASS(AMDGPUAlwaysInline, "amdgpu-always-inline",
+                "AMDGPU Inline All Functions", false, false)
+
 char AMDGPUAlwaysInline::ID = 0;
 
 bool AMDGPUAlwaysInline::runOnModule(Module &M) {
index 67c9a1987d3be92b17cf3d0be194caae0abb6832..404598ff47389823e34fcc2fea76493d7c72daf8 100644 (file)
@@ -139,6 +139,7 @@ extern "C" void LLVMInitializeAMDGPUTarget() {
   initializeSIShrinkInstructionsPass(*PR);
   initializeSIFixControlFlowLiveIntervalsPass(*PR);
   initializeSILoadStoreOptimizerPass(*PR);
+  initializeAMDGPUAlwaysInlinePass(*PR);
   initializeAMDGPUAnnotateKernelFeaturesPass(*PR);
   initializeAMDGPUAnnotateUniformValuesPass(*PR);
   initializeAMDGPULowerIntrinsicsPass(*PR);