* alpha_mach_dep.S: Ditto.
* mips_sgi_mach_dep.s: Ditto.
* mips_ultrix_mach_dep.s: Ditto.
* rs6000_mach_dep.s: Ditto.
* Makefile.am (EXTRA_libgc_la_SOURCES): Remove alpha_mach_dep.S,
mips_sgi_mach_dep.s, mips_ultrix_mach_dep.s and rs6000_mach_dep.s.
* Makefile.direct (SRCS): Ditto.
* Makefile.dj (SRCS): Ditto.
* Makefile.direct (mach_dep.o): Remove mips_sgi_mach_dep.s,
mips_ultrix_mach_dep.s, rs6000_mach_dep.s from the dependencies.
* Makefile.dj (mach_dep.o): Ditto.
* Makefile.dj (mach_dep.o): Remove all "if_mach" statements (since
the target is x86).
* PCR-Makefile (mach_dep.o): Remove rs6000_mach_dep.s from the
dependencies; remove all "if_mach" statements except for MIPS.
libgc_la_DEPENDENCIES = @addobjs@
libgc_la_LDFLAGS = $(extra_ldflags_libgc) -version-info 1:3:0 -no-undefined
-EXTRA_libgc_la_SOURCES = alpha_mach_dep.S \
- mips_sgi_mach_dep.s mips_ultrix_mach_dep.s \
- rs6000_mach_dep.s sparc_mach_dep.S sparc_netbsd_mach_dep.s \
+EXTRA_libgc_la_SOURCES = sparc_mach_dep.S sparc_netbsd_mach_dep.s \
sparc_sunos4_mach_dep.s ia64_save_regs_in_stack.s
CORD_OBJS= cord/cordbscs.o cord/cordxtra.o cord/cordprnt.o
-SRCS= $(CSRCS) mips_sgi_mach_dep.s rs6000_mach_dep.s alpha_mach_dep.S \
+SRCS= $(CSRCS) \
sparc_mach_dep.S include/gc.h include/gc_typed.h include/gc_tiny_fl.h \
include/gc_version.h include/private/gc_hdrs.h include/private/gc_priv.h \
include/private/gcconfig.h include/private/gc_pmark.h \
include/gc_inline.h include/gc_mark.h extra/threadlibs.c \
extra/if_mach.c extra/if_not_there.c gc_cpp.cc include/gc_cpp.h \
extra/gcname.c include/weakpointer.h include/private/gc_locks.h \
- mips_ultrix_mach_dep.s \
include/new_gc_alloc.h include/gc_allocator.h \
include/javaxfc.h sparc_sunos4_mach_dep.s sparc_netbsd_mach_dep.s \
include/gc_backptr.h include/gc_gcj.h include/private/dbg_mlc.h \
# gcc -shared -Wl,-soname=libgc.so.0 -o libgc.so.0 $(LIBOBJS) dyn_load.lo
# touch liblinuxgc.so
-mach_dep.o: $(srcdir)/mach_dep.c $(srcdir)/mips_sgi_mach_dep.s \
- $(srcdir)/mips_ultrix_mach_dep.s \
- $(srcdir)/rs6000_mach_dep.s \
- $(srcdir)/sparc_mach_dep.S $(srcdir)/sparc_sunos4_mach_dep.s \
+mach_dep.o: $(srcdir)/mach_dep.c $(srcdir)/sparc_mach_dep.S \
+ $(srcdir)/sparc_sunos4_mach_dep.s \
$(srcdir)/ia64_save_regs_in_stack.s \
$(srcdir)/sparc_netbsd_mach_dep.s $(UTILS)
rm -f mach_dep.o
CORD_OBJS= cord/cordbscs.o cord/cordxtra.o cord/cordprnt.o
-SRCS= $(CSRCS) mips_sgi_mach_dep.S rs6000_mach_dep.s alpha_mach_dep.S \
+SRCS= $(CSRCS) \
sparc_mach_dep.S include/gc.h include/gc_version.h include/gc_typed.h \
include/private/gc_hdrs.h include/private/gc_priv.h \
include/private/gcconfig.h include/private/gc_mark.h \
include/gc_inline.h gc.man extra/threadlibs.c \
extra/if_mach.c extra/if_not_there.c gc_cpp.cc include/gc_cpp.h \
include/weakpointer.h include/private/gc_locks.h \
- mips_ultrix_mach_dep.s \
include/new_gc_alloc.h include/javaxfc.h sparc_sunos4_mach_dep.s \
include/private/solaris_threads.h include/gc_backptr.h \
include/gc_gcj.h include/private/dbg_mlc.h \
gcc -shared -o liblinuxgc.so $(OBJS) dyn_load.o -lo
ln liblinuxgc.so libgc.so
-mach_dep.o: $(srcdir)/mach_dep.c $(srcdir)/mips_sgi_mach_dep.S $(srcdir)/mips_ultrix_mach_dep.s \
- $(srcdir)/rs6000_mach_dep.s $(UTILS)
+mach_dep.o: $(srcdir)/mach_dep.c $(UTILS)
rm -f mach_dep.o
- ./if_mach MIPS IRIX5 $(AS) -o mach_dep.o $(srcdir)/mips_sgi_mach_dep.S
- ./if_mach MIPS RISCOS $(AS) -o mach_dep.o $(srcdir)/mips_ultrix_mach_dep.s
- ./if_mach MIPS ULTRIX $(AS) -o mach_dep.o $(srcdir)/mips_ultrix_mach_dep.s
- ./if_mach POWERPC AIX $(AS) -o mach_dep.o $(srcdir)/rs6000_mach_dep.s
- ./if_mach ALPHA "" $(AS) -o mach_dep.o $(srcdir)/alpha_mach_dep.S
- ./if_mach SPARC SOLARIS $(AS) -o mach_dep.o $(srcdir)/sparc_mach_dep.S
- ./if_mach SPARC SUNOS4 $(AS) -o mach_dep.o $(srcdir)/sparc_sunos4_mach_dep.s
./if_not_there mach_dep.o $(CC) -c $(SPECIALCFLAGS) $(srcdir)/mach_dep.c
mark_rts.o: $(srcdir)/mark_rts.c if_mach if_not_there $(UTILS)
$(LDR) $(CONFIG_LDRFLAGS) -o gc.o $(COBJ) mach_dep.o
-mach_dep.o: mach_dep.c mips_mach_dep.s rs6000_mach_dep.s if_mach if_not_there
+mach_dep.o: mach_dep.c mips_mach_dep.s if_mach if_not_there
rm -f mach_dep.o
./if_mach MIPS "" as -o mach_dep.o mips_mach_dep.s
- ./if_mach POWERPC AIX as -o mach_dep.o rs6000_mach_dep.s
- ./if_mach ALPHA "" as -o mach_dep.o alpha_mach_dep.s
- ./if_mach SPARC SOLARIS as -o mach_dep.o sparc_mach_dep.s
./if_not_there mach_dep.o $(CC) -c $(SPECIALCFLAGS) mach_dep.c
if_mach: extra/if_mach.c gcconfig.h
if_not_there: extra/if_not_there.c
$(CC) $(CFLAGS) -o if_not_there extra/if_not_there.c
-
-
+++ /dev/null
- .arch ev6
-
- .text
- .align 4
- .globl GC_push_regs
- .ent GC_push_regs 2
-GC_push_regs:
- ldgp $gp, 0($27)
- lda $sp, -16($sp)
- stq $26, 0($sp)
- .mask 0x04000000, 0
- .frame $sp, 16, $26, 0
-
-/* $0 integer result */
-/* $1-$8 temp regs - not preserved cross calls */
-/* $9-$15 call saved regs */
-/* $16-$21 argument regs - not preserved cross calls */
-/* $22-$28 temp regs - not preserved cross calls */
-/* $29 global pointer - not preserved cross calls */
-/* $30 stack pointer */
-
-# define call_push(x) \
- mov x, $16; \
- jsr $26, GC_push_one; \
- ldgp $gp, 0($26)
-
- call_push($9)
- call_push($10)
- call_push($11)
- call_push($12)
- call_push($13)
- call_push($14)
- call_push($15)
-
-/* $f0-$f1 floating point results */
-/* $f2-$f9 call saved regs */
-/* $f10-$f30 temp regs - not preserved cross calls */
-
- /* Use the most efficient transfer method for this hardware. */
- /* Bit 1 detects the FIX extension, which includes ftoit. */
- amask 2, $0
- bne $0, $use_stack
-
-#undef call_push
-#define call_push(x) \
- ftoit x, $16; \
- jsr $26, GC_push_one; \
- ldgp $gp, 0($26)
-
- call_push($f2)
- call_push($f3)
- call_push($f4)
- call_push($f5)
- call_push($f6)
- call_push($f7)
- call_push($f8)
- call_push($f9)
-
- ldq $26, 0($sp)
- lda $sp, 16($sp)
- ret $31, ($26), 1
-
- .align 4
-$use_stack:
-
-#undef call_push
-#define call_push(x) \
- stt x, 8($sp); \
- ldq $16, 8($sp); \
- jsr $26, GC_push_one; \
- ldgp $gp, 0($26)
-
- call_push($f2)
- call_push($f3)
- call_push($f4)
- call_push($f5)
- call_push($f6)
- call_push($f7)
- call_push($f8)
- call_push($f9)
-
- ldq $26, 0($sp)
- lda $sp, 16($sp)
- ret $31, ($26), 1
-
- .end GC_push_regs
+++ /dev/null
-#include <sys/regdef.h>
-#include <sys/asm.h>
-/* This file must be preprocessed. But the SGI assembler always does */
-/* that. Furthermore, a generic preprocessor won't do, since some of */
-/* the SGI-supplied include files rely on behavior of the MIPS */
-/* assembler. Hence we treat and name this file as though it required */
-/* no preprocessing. */
-
-# define call_push(x) move $4,x; jal GC_push_one
-
- .option pic2
- .text
-/* Mark from machine registers that are saved by C compiler */
-# define FRAMESZ 32
-# define RAOFF FRAMESZ-SZREG
-# define GPOFF FRAMESZ-(2*SZREG)
- NESTED(GC_push_regs, FRAMESZ, ra)
- .mask 0x80000000,-SZREG # inform debugger of saved ra loc
- move t0,gp
- SETUP_GPX(t8)
- PTR_SUBU sp,FRAMESZ
-# ifdef SETUP_GP64
- SETUP_GP64(GPOFF, GC_push_regs)
-# endif
- SAVE_GP(GPOFF)
- REG_S ra,RAOFF(sp)
-# if (_MIPS_SIM == _ABIO32)
- call_push($2)
- call_push($3)
-# endif
- call_push($16)
- call_push($17)
- call_push($18)
- call_push($19)
- call_push($20)
- call_push($21)
- call_push($22)
- call_push($23)
- call_push($30)
- REG_L ra,RAOFF(sp)
-# ifdef RESTORE_GP64
- RESTORE_GP64
-# endif
- PTR_ADDU sp,FRAMESZ
- j ra
- .end GC_push_regs
+++ /dev/null
-# define call_push(x) move $4,x; jal GC_push_one
-
- .text
- # Mark from machine registers that are saved by C compiler
- .globl GC_push_regs
- .ent GC_push_regs
-GC_push_regs:
- subu $sp,8 ## Need to save only return address
- sw $31,4($sp)
- .mask 0x80000000,-4
- .frame $sp,8,$31
- call_push($2)
- call_push($3)
- call_push($16)
- call_push($17)
- call_push($18)
- call_push($19)
- call_push($20)
- call_push($21)
- call_push($22)
- call_push($23)
- call_push($30)
- lw $31,4($sp)
- addu $sp,8
- j $31
- .end GC_push_regs
+++ /dev/null
- .set r0,0
- .set r1,1
- .set r2,2
- .set r3,3
- .set r4,4
- .set r5,5
- .set r6,6
- .set r7,7
- .set r8,8
- .set r9,9
- .set r10,10
- .set r11,11
- .set r12,12
- .set r13,13
- .set r14,14
- .set r15,15
- .set r16,16
- .set r17,17
- .set r18,18
- .set r19,19
- .set r20,20
- .set r21,21
- .set r22,22
- .set r23,23
- .set r24,24
- .set r25,25
- .set r26,26
- .set r27,27
- .set r28,28
- .set r29,29
- .set r30,30
- .set r31,31
-
- .extern .GC_push_one
- # Mark from machine registers that are saved by C compiler
- .globl .GC_push_regs
-.csect .text[PR]
- .align 2
- .globl GC_push_regs
- .globl .GC_push_regs
-.csect GC_push_regs[DS]
-GC_push_regs:
- .long .GC_push_regs, TOC[tc0], 0
-.csect .text[PR]
-.GC_push_regs:
- stu r1,-64(r1) # reserve stack frame
- mflr r0 # save link register
- st r0,0x48(r1)
- oril r3,r2,0x0 # mark from r2
- bl .GC_push_one
- cror 15,15,15
- oril r3,r13,0x0 # mark from r13-r31
- bl .GC_push_one
- cror 15,15,15
- oril r3,r14,0x0
- bl .GC_push_one
- cror 15,15,15
- oril r3,r15,0x0
- bl .GC_push_one
- cror 15,15,15
- oril r3,r16,0x0
- bl .GC_push_one
- cror 15,15,15
- oril r3,r17,0x0
- bl .GC_push_one
- cror 15,15,15
- oril r3,r18,0x0
- bl .GC_push_one
- cror 15,15,15
- oril r3,r19,0x0
- bl .GC_push_one
- cror 15,15,15
- oril r3,r20,0x0
- bl .GC_push_one
- cror 15,15,15
- oril r3,r21,0x0
- bl .GC_push_one
- cror 15,15,15
- oril r3,r22,0x0
- bl .GC_push_one
- cror 15,15,15
- oril r3,r23,0x0
- bl .GC_push_one
- cror 15,15,15
- oril r3,r24,0x0
- bl .GC_push_one
- cror 15,15,15
- oril r3,r25,0x0
- bl .GC_push_one
- cror 15,15,15
- oril r3,r26,0x0
- bl .GC_push_one
- cror 15,15,15
- oril r3,r27,0x0
- bl .GC_push_one
- cror 15,15,15
- oril r3,r28,0x0
- bl .GC_push_one
- cror 15,15,15
- oril r3,r29,0x0
- bl .GC_push_one
- cror 15,15,15
- oril r3,r30,0x0
- bl .GC_push_one
- cror 15,15,15
- oril r3,r31,0x0
- bl .GC_push_one
- cror 15,15,15
- l r0,0x48(r1)
- mtlr r0
- ai r1,r1,64
- br
- .long 0
- .byte 0,0,0,0,0,0,0,0
projects / gc / commitdiff