]> granicus.if.org Git - llvm/commitdiff
R600: Fix assert on copy of an i1 on pre-SI
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Sun, 23 Nov 2014 02:57:52 +0000 (02:57 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Sun, 23 Nov 2014 02:57:52 +0000 (02:57 +0000)
i1 is not a legal type on Evergreen, so this combine proceeded
and tried to produce a bitcast between i1 and i8.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@222630 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/R600/AMDGPUISelLowering.cpp

index 2f95b74fcf74bbf95454611562ae1c985cc89c74..9ff41afe30bbe6485362bafba23c3f39b9a60d9c 100644 (file)
@@ -2155,7 +2155,8 @@ SDValue AMDGPUTargetLowering::performStoreCombine(SDNode *N,
   SDValue Value = SN->getValue();
   EVT VT = Value.getValueType();
 
-  if (isTypeLegal(VT) || SN->isVolatile() || !ISD::isNormalLoad(Value.getNode()))
+  if (isTypeLegal(VT) || SN->isVolatile() ||
+      !ISD::isNormalLoad(Value.getNode()) || VT.getSizeInBits() < 8)
     return SDValue();
 
   LoadSDNode *LoadVal = cast<LoadSDNode>(Value);