[llvm-mca] Add tests for partial register writes.

llvm-mca doesn't know that on modern AMD processors, portions of a general
purpose register are not treated independently. So, a partial register write has
a false dependency on the super-register.

The issue with partial register writes will be addressed by a follow-up patch.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@336778 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/tools/llvm-mca/X86/BtVer2/partial-reg-update-3.s b/test/tools/llvm-mca/X86/BtVer2/partial-reg-update-3.s
new file mode 100644 (file)
index 0000000..a6e2b96
--- /dev/null
+++ b/test/tools/llvm-mca/X86/BtVer2/partial-reg-update-3.s
@@ -0,0 +1,81 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1500 -timeline -timeline-max-iterations=3 < %s | FileCheck %s
+
+# perf stat reports a throughput of 1.00 IPC for this code snippet.
+
+# The ILP is limited by the false dependency on %dx. So, the mov cannot execute
+# in parallel with the add.
+
+add %cx, %dx
+mov %ax, %dx
+xor %bx, %dx
+
+# CHECK:      Iterations:        1500
+# CHECK-NEXT: Instructions:      4500
+# CHECK-NEXT: Total Cycles:      2254
+# CHECK-NEXT: Dispatch Width:    2
+# CHECK-NEXT: IPC:               2.00
+# CHECK-NEXT: Block RThroughput: 1.5
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  1      1     0.50                        addw   %cx, %dx
+# CHECK-NEXT:  1      1     0.50                        movw   %ax, %dx
+# CHECK-NEXT:  1      1     0.50                        xorw   %bx, %dx
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - JALU0
+# CHECK-NEXT: [1]   - JALU1
+# CHECK-NEXT: [2]   - JDiv
+# CHECK-NEXT: [3]   - JFPA
+# CHECK-NEXT: [4]   - JFPM
+# CHECK-NEXT: [5]   - JFPU0
+# CHECK-NEXT: [6]   - JFPU1
+# CHECK-NEXT: [7]   - JLAGU
+# CHECK-NEXT: [8]   - JMul
+# CHECK-NEXT: [9]   - JSAGU
+# CHECK-NEXT: [10]  - JSTC
+# CHECK-NEXT: [11]  - JVALU0
+# CHECK-NEXT: [12]  - JVALU1
+# CHECK-NEXT: [13]  - JVIMUL
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]
+# CHECK-NEXT: 1.50   1.50    -      -      -      -      -      -      -      -      -      -      -      -
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   Instructions:
+# CHECK-NEXT: 1.00    -      -      -      -      -      -      -      -      -      -      -      -      -     addw   %cx, %dx
+# CHECK-NEXT:  -     1.00    -      -      -      -      -      -      -      -      -      -      -      -     movw   %ax, %dx
+# CHECK-NEXT: 0.50   0.50    -      -      -      -      -      -      -      -      -      -      -      -     xorw   %bx, %dx
+
+# CHECK:      Timeline view:
+# CHECK-NEXT: Index     012345678
+
+# CHECK:      [0,0]     DeER .  .   addw       %cx, %dx
+# CHECK-NEXT: [0,1]     DeER .  .   movw       %ax, %dx
+# CHECK-NEXT: [0,2]     .DeER.  .   xorw       %bx, %dx
+# CHECK-NEXT: [1,0]     .D=eER  .   addw       %cx, %dx
+# CHECK-NEXT: [1,1]     . DeER  .   movw       %ax, %dx
+# CHECK-NEXT: [1,2]     . D=eER .   xorw       %bx, %dx
+# CHECK-NEXT: [2,0]     .  D=eER.   addw       %cx, %dx
+# CHECK-NEXT: [2,1]     .  DeE-R.   movw       %ax, %dx
+# CHECK-NEXT: [2,2]     .   DeE-R   xorw       %bx, %dx
+
+# CHECK:      Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK:            [0]    [1]    [2]    [3]
+# CHECK-NEXT: 0.     3     1.7    0.3    0.0       addw        %cx, %dx
+# CHECK-NEXT: 1.     3     1.0    1.0    0.3       movw        %ax, %dx
+# CHECK-NEXT: 2.     3     1.3    0.0    0.3       xorw        %bx, %dx

diff --git a/test/tools/llvm-mca/X86/BtVer2/partial-reg-update-4.s b/test/tools/llvm-mca/X86/BtVer2/partial-reg-update-4.s
new file mode 100644 (file)
index 0000000..dda53ba
--- /dev/null
+++ b/test/tools/llvm-mca/X86/BtVer2/partial-reg-update-4.s
@@ -0,0 +1,82 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1500 -timeline -timeline-max-iterations=3 < %s | FileCheck %s
+
+# perf stat reports a throughput of 0.60 IPC for this code snippet.
+
+# The lzcnt cannot execute in parallel with the imul because there is a false
+# dependency on %bx.
+
+imul %ax, %bx
+lzcnt %ax, %bx
+add %cx, %bx
+
+# CHECK:      Iterations:        1500
+# CHECK-NEXT: Instructions:      4500
+# CHECK-NEXT: Total Cycles:      3006
+# CHECK-NEXT: Dispatch Width:    2
+# CHECK-NEXT: IPC:               1.50
+# CHECK-NEXT: Block RThroughput: 2.0
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  2      3     1.00                        imulw  %ax, %bx
+# CHECK-NEXT:  1      1     0.50                        lzcntw %ax, %bx
+# CHECK-NEXT:  1      1     0.50                        addw   %cx, %bx
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - JALU0
+# CHECK-NEXT: [1]   - JALU1
+# CHECK-NEXT: [2]   - JDiv
+# CHECK-NEXT: [3]   - JFPA
+# CHECK-NEXT: [4]   - JFPM
+# CHECK-NEXT: [5]   - JFPU0
+# CHECK-NEXT: [6]   - JFPU1
+# CHECK-NEXT: [7]   - JLAGU
+# CHECK-NEXT: [8]   - JMul
+# CHECK-NEXT: [9]   - JSAGU
+# CHECK-NEXT: [10]  - JSTC
+# CHECK-NEXT: [11]  - JVALU0
+# CHECK-NEXT: [12]  - JVALU1
+# CHECK-NEXT: [13]  - JVIMUL
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]
+# CHECK-NEXT: 1.50   1.50    -      -      -      -      -      -     1.00    -      -      -      -      -
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   Instructions:
+# CHECK-NEXT:  -     1.00    -      -      -      -      -      -     1.00    -      -      -      -      -     imulw  %ax, %bx
+# CHECK-NEXT: 1.00    -      -      -      -      -      -      -      -      -      -      -      -      -     lzcntw %ax, %bx
+# CHECK-NEXT: 0.50   0.50    -      -      -      -      -      -      -      -      -      -      -      -     addw   %cx, %bx
+
+# CHECK:      Timeline view:
+# CHECK-NEXT:                     01
+# CHECK-NEXT: Index     0123456789
+
+# CHECK:      [0,0]     DeeeER    ..   imulw   %ax, %bx
+# CHECK-NEXT: [0,1]     .DeE-R    ..   lzcntw  %ax, %bx
+# CHECK-NEXT: [0,2]     .D=eE-R   ..   addw    %cx, %bx
+# CHECK-NEXT: [1,0]     . D=eeeER ..   imulw   %ax, %bx
+# CHECK-NEXT: [1,1]     .  DeE--R ..   lzcntw  %ax, %bx
+# CHECK-NEXT: [1,2]     .  D=eE--R..   addw    %cx, %bx
+# CHECK-NEXT: [2,0]     .   D=eeeER.   imulw   %ax, %bx
+# CHECK-NEXT: [2,1]     .    DeE--R.   lzcntw  %ax, %bx
+# CHECK-NEXT: [2,2]     .    D=eE--R   addw    %cx, %bx
+
+# CHECK:      Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK:            [0]    [1]    [2]    [3]
+# CHECK-NEXT: 0.     3     1.7    0.3    0.0       imulw       %ax, %bx
+# CHECK-NEXT: 1.     3     1.0    1.0    1.7       lzcntw      %ax, %bx
+# CHECK-NEXT: 2.     3     2.0    0.0    1.7       addw        %cx, %bx

diff --git a/test/tools/llvm-mca/X86/BtVer2/partial-reg-update-5.s b/test/tools/llvm-mca/X86/BtVer2/partial-reg-update-5.s
new file mode 100644 (file)
index 0000000..db64be6
--- /dev/null
+++ b/test/tools/llvm-mca/X86/BtVer2/partial-reg-update-5.s
@@ -0,0 +1,64 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1500 -timeline -timeline-max-iterations=3 < %s | FileCheck %s
+
+# perf stat reports a throughput of 1.00 IPC for this code snippet.
+
+lzcnt %ax, %bx  ## partial register stall.
+
+# CHECK:      Iterations:        1500
+# CHECK-NEXT: Instructions:      1500
+# CHECK-NEXT: Total Cycles:      753
+# CHECK-NEXT: Dispatch Width:    2
+# CHECK-NEXT: IPC:               1.99
+# CHECK-NEXT: Block RThroughput: 0.5
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  1      1     0.50                        lzcntw %ax, %bx
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - JALU0
+# CHECK-NEXT: [1]   - JALU1
+# CHECK-NEXT: [2]   - JDiv
+# CHECK-NEXT: [3]   - JFPA
+# CHECK-NEXT: [4]   - JFPM
+# CHECK-NEXT: [5]   - JFPU0
+# CHECK-NEXT: [6]   - JFPU1
+# CHECK-NEXT: [7]   - JLAGU
+# CHECK-NEXT: [8]   - JMul
+# CHECK-NEXT: [9]   - JSAGU
+# CHECK-NEXT: [10]  - JSTC
+# CHECK-NEXT: [11]  - JVALU0
+# CHECK-NEXT: [12]  - JVALU1
+# CHECK-NEXT: [13]  - JVIMUL
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]
+# CHECK-NEXT: 0.50   0.50    -      -      -      -      -      -      -      -      -      -      -      -
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   Instructions:
+# CHECK-NEXT: 0.50   0.50    -      -      -      -      -      -      -      -      -      -      -      -     lzcntw %ax, %bx
+
+# CHECK:      Timeline view:
+# CHECK-NEXT: Index     01234
+
+# CHECK:      [0,0]     DeER.   lzcntw %ax, %bx
+# CHECK-NEXT: [1,0]     DeER.   lzcntw %ax, %bx
+# CHECK-NEXT: [2,0]     .DeER   lzcntw %ax, %bx
+
+# CHECK:      Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK:            [0]    [1]    [2]    [3]
+# CHECK-NEXT: 0.     3     1.0    1.0    0.0       lzcntw      %ax, %bx

diff --git a/test/tools/llvm-mca/X86/BtVer2/partial-reg-update-6.s b/test/tools/llvm-mca/X86/BtVer2/partial-reg-update-6.s
new file mode 100644 (file)
index 0000000..c66b567
--- /dev/null
+++ b/test/tools/llvm-mca/X86/BtVer2/partial-reg-update-6.s
@@ -0,0 +1,83 @@
+# NOTE: Assertions have been autogenerated by utils/update_mca_test_checks.py
+# RUN: llvm-mca -mtriple=x86_64-unknown-unknown -mcpu=btver2 -iterations=1500 -timeline -timeline-max-iterations=3 < %s | FileCheck %s
+
+# perf stat reports a throughput of 0.60 IPC for this code snippet.
+# Each lzcnt has a false dependency on %ecx; the first lzcnt has to wait on the
+# imul. However, the folded load can start immediately.
+# The last lzcnt has a false dependency on %cx. However, even in this case, the
+# folded load can start immediately.
+
+imul %edx, %ecx
+lzcnt (%rsp), %cx
+lzcnt 2(%rsp), %cx
+
+# CHECK:      Iterations:        1500
+# CHECK-NEXT: Instructions:      4500
+# CHECK-NEXT: Total Cycles:      4507
+# CHECK-NEXT: Dispatch Width:    2
+# CHECK-NEXT: IPC:               1.00
+# CHECK-NEXT: Block RThroughput: 2.0
+
+# CHECK:      Instruction Info:
+# CHECK-NEXT: [1]: #uOps
+# CHECK-NEXT: [2]: Latency
+# CHECK-NEXT: [3]: RThroughput
+# CHECK-NEXT: [4]: MayLoad
+# CHECK-NEXT: [5]: MayStore
+# CHECK-NEXT: [6]: HasSideEffects
+
+# CHECK:      [1]    [2]    [3]    [4]    [5]    [6]    Instructions:
+# CHECK-NEXT:  2      3     1.00                        imull  %edx, %ecx
+# CHECK-NEXT:  1      4     1.00    *                   lzcntw (%rsp), %cx
+# CHECK-NEXT:  1      4     1.00    *                   lzcntw 2(%rsp), %cx
+
+# CHECK:      Resources:
+# CHECK-NEXT: [0]   - JALU0
+# CHECK-NEXT: [1]   - JALU1
+# CHECK-NEXT: [2]   - JDiv
+# CHECK-NEXT: [3]   - JFPA
+# CHECK-NEXT: [4]   - JFPM
+# CHECK-NEXT: [5]   - JFPU0
+# CHECK-NEXT: [6]   - JFPU1
+# CHECK-NEXT: [7]   - JLAGU
+# CHECK-NEXT: [8]   - JMul
+# CHECK-NEXT: [9]   - JSAGU
+# CHECK-NEXT: [10]  - JSTC
+# CHECK-NEXT: [11]  - JVALU0
+# CHECK-NEXT: [12]  - JVALU1
+# CHECK-NEXT: [13]  - JVIMUL
+
+# CHECK:      Resource pressure per iteration:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]
+# CHECK-NEXT: 1.50   1.50    -      -      -      -      -     2.00   1.00    -      -      -      -      -
+
+# CHECK:      Resource pressure by instruction:
+# CHECK-NEXT: [0]    [1]    [2]    [3]    [4]    [5]    [6]    [7]    [8]    [9]    [10]   [11]   [12]   [13]   Instructions:
+# CHECK-NEXT:  -     1.00    -      -      -      -      -      -     1.00    -      -      -      -      -     imull  %edx, %ecx
+# CHECK-NEXT: 0.99   0.01    -      -      -      -      -     1.00    -      -      -      -      -      -     lzcntw (%rsp), %cx
+# CHECK-NEXT: 0.50   0.50    -      -      -      -      -     1.00    -      -      -      -      -      -     lzcntw 2(%rsp), %cx
+
+# CHECK:      Timeline view:
+# CHECK-NEXT:                     012345
+# CHECK-NEXT: Index     0123456789
+
+# CHECK:      [0,0]     DeeeER    .    .   imull       %edx, %ecx
+# CHECK-NEXT: [0,1]     .DeeeeER  .    .   lzcntw      (%rsp), %cx
+# CHECK-NEXT: [0,2]     .D=eeeeER .    .   lzcntw      2(%rsp), %cx
+# CHECK-NEXT: [1,0]     . D====eeeER   .   imull       %edx, %ecx
+# CHECK-NEXT: [1,1]     .  DeeeeE--R   .   lzcntw      (%rsp), %cx
+# CHECK-NEXT: [1,2]     .  D=eeeeE--R  .   lzcntw      2(%rsp), %cx
+# CHECK-NEXT: [2,0]     .   D=====eeeER.   imull       %edx, %ecx
+# CHECK-NEXT: [2,1]     .    DeeeeE---R.   lzcntw      (%rsp), %cx
+# CHECK-NEXT: [2,2]     .    D=eeeeE---R   lzcntw      2(%rsp), %cx
+
+# CHECK:      Average Wait times (based on the timeline view):
+# CHECK-NEXT: [0]: Executions
+# CHECK-NEXT: [1]: Average time spent waiting in a scheduler's queue
+# CHECK-NEXT: [2]: Average time spent waiting in a scheduler's queue while ready
+# CHECK-NEXT: [3]: Average time elapsed from WB until retire stage
+
+# CHECK:            [0]    [1]    [2]    [3]
+# CHECK-NEXT: 0.     3     4.0    0.3    0.0       imull       %edx, %ecx
+# CHECK-NEXT: 1.     3     1.0    1.0    1.7       lzcntw      (%rsp), %cx
+# CHECK-NEXT: 2.     3     2.0    2.0    1.7       lzcntw      2(%rsp), %cx