]> granicus.if.org Git - llvm/commitdiff
AMDGPU/GlobalISel: Don't re-get subtarget
authorMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 3 Oct 2019 05:46:10 +0000 (05:46 +0000)
committerMatt Arsenault <Matthew.Arsenault@amd.com>
Thu, 3 Oct 2019 05:46:10 +0000 (05:46 +0000)
It's already available in the class.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@373568 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AMDGPU/AMDGPURegisterBankInfo.cpp

index badcd77aaef1fe7dcb46830002418addf827c4fc..8aa296b1132dc563842f8e09299e5b292c71e511 100644 (file)
@@ -662,9 +662,7 @@ bool AMDGPURegisterBankInfo::executeInWaterfallLoop(
   MachineInstr &MI,
   MachineRegisterInfo &MRI,
   ArrayRef<unsigned> OpIndices) const {
-  MachineFunction *MF = MI.getParent()->getParent();
-  const GCNSubtarget &ST = MF->getSubtarget<GCNSubtarget>();
-  const SIInstrInfo *TII = ST.getInstrInfo();
+  MachineFunction *MF = &B.getMF();
   MachineBasicBlock::iterator I(MI);
 
   MachineBasicBlock &MBB = *MI.getParent();
@@ -2126,8 +2124,7 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
     return getDefaultMappingVOP(MI);
   case AMDGPU::G_UMULH:
   case AMDGPU::G_SMULH: {
-    if (MF.getSubtarget<GCNSubtarget>().hasScalarMulHiInsts() &&
-        isSALUMapping(MI))
+    if (Subtarget.hasScalarMulHiInsts() && isSALUMapping(MI))
       return getDefaultMappingSOP(MI);
     return getDefaultMappingVOP(MI);
   }
@@ -2301,7 +2298,7 @@ AMDGPURegisterBankInfo::getInstrMapping(const MachineInstr &MI) const {
                      Op3Bank == AMDGPU::SGPRRegBankID &&
       (Size == 32 || (Size == 64 &&
                       (Pred == CmpInst::ICMP_EQ || Pred == CmpInst::ICMP_NE) &&
-                      MF.getSubtarget<GCNSubtarget>().hasScalarCompareEq64()));
+                      Subtarget.hasScalarCompareEq64()));
 
     unsigned Op0Bank = CanUseSCC ? AMDGPU::SCCRegBankID : AMDGPU::VCCRegBankID;