Add extended error/warning handling (just functionality, it's not actually

used yet).

svn path=/trunk/yasm/; revision=758

diff --git a/modules/arch/x86/x86id.re b/modules/arch/x86/x86id.re
index b2693e13ca2ba3d6bfe138892fd6c2231507f2fa..137073423c3b851fe2c2159fcd347b88b3142f57 100644 (file)
--- a/modules/arch/x86/x86id.re
+++ b/modules/arch/x86/x86id.re
@@ -85,6 +85,18 @@ static unsigned long cpu_enabled = ~CPU_Any;
 #define MOD_Imm8    (1UL<<7)   /* Parameter is included as immediate byte */
 #define MOD_AdSizeR (1UL<<8)   /* Parameter replaces addrsize (jmprel only) */
 
+/* Modifiers that aren't actually used as modifiers.  Rather, if set, bits
+ * 20-27 in the modifier are used as an index into an array.
+ * Obviously, only one of these may be set at a time.
+ */
+#define MOD_ExtNone (0UL<<28)  /* No extended modifier */
+#define MOD_ExtErr  (1UL<<28)  /* Extended error: index into error strings */
+#define MOD_ExtWarn (2UL<<28)  /* Extended warning: index into warning strs */
+#define MOD_Ext_MASK (0xFUL<<28)
+#define MOD_ExtIndex_SHIFT     20
+#define MOD_ExtIndex(indx)     (((unsigned long)(indx))<<MOD_ExtIndex_SHIFT)
+#define MOD_ExtIndex_MASK      (0xFFUL<<MOD_ExtIndex_SHIFT)
+
 /* Operand types.  These are more detailed than the "general" types for all
  * architectures, as they include the size, for instance.
  * Bit Breakdown (from LSB to MSB):
@@ -1615,17 +1627,37 @@ x86_new_insn(const unsigned long data[4], int num_operands,
 
     if (!found) {
        /* Didn't find a matching one */
-       /* FIXME: This needs to be more descriptive of certain reasons for a
-        * mismatch.  E.g.:
-        *  "mismatch in operand sizes"
-        *  "operand size not specified"
-        * etc.  This will probably require adding dummy error catchers in the
-        * insn list which are only looked at if we get here.
-        */
        Error(_("invalid combination of opcode and operands"));
        return NULL;
     }
 
+    /* Extended error/warning handling */
+    switch (info->modifiers & MOD_Ext_MASK) {
+       case MOD_ExtNone:
+           /* No extended modifier, so just continue */
+           break;
+       case MOD_ExtErr:
+           switch ((info->modifiers & MOD_ExtIndex_MASK)>>MOD_ExtIndex_SHIFT) {
+               case 0:
+                   Error(_("mismatch in operand sizes"));
+                   break;
+               case 1:
+                   Error(_("operand size not specified"));
+                   break;
+               default:
+                   InternalError(_("unrecognized x86 ext mod index"));
+           }
+           return NULL;    /* It was an error */
+       case MOD_ExtWarn:
+           switch ((info->modifiers & MOD_ExtIndex_MASK)>>MOD_ExtIndex_SHIFT) {
+               default:
+                   InternalError(_("unrecognized x86 ext mod index"));
+           }
+           break;
+       default:
+           InternalError(_("unrecognized x86 extended modifier"));
+    }
+
     /* Shortcut to JmpRel */
     if (operands && (info->operands[0] & OPA_MASK) == OPA_JmpRel)
        return x86_new_jmprel(data, num_operands, operands, info, cur_section,

diff --git a/src/arch/x86/x86id.re b/src/arch/x86/x86id.re
index b2693e13ca2ba3d6bfe138892fd6c2231507f2fa..137073423c3b851fe2c2159fcd347b88b3142f57 100644 (file)
--- a/src/arch/x86/x86id.re
+++ b/src/arch/x86/x86id.re
@@ -85,6 +85,18 @@ static unsigned long cpu_enabled = ~CPU_Any;
 #define MOD_Imm8    (1UL<<7)   /* Parameter is included as immediate byte */
 #define MOD_AdSizeR (1UL<<8)   /* Parameter replaces addrsize (jmprel only) */
 
+/* Modifiers that aren't actually used as modifiers.  Rather, if set, bits
+ * 20-27 in the modifier are used as an index into an array.
+ * Obviously, only one of these may be set at a time.
+ */
+#define MOD_ExtNone (0UL<<28)  /* No extended modifier */
+#define MOD_ExtErr  (1UL<<28)  /* Extended error: index into error strings */
+#define MOD_ExtWarn (2UL<<28)  /* Extended warning: index into warning strs */
+#define MOD_Ext_MASK (0xFUL<<28)
+#define MOD_ExtIndex_SHIFT     20
+#define MOD_ExtIndex(indx)     (((unsigned long)(indx))<<MOD_ExtIndex_SHIFT)
+#define MOD_ExtIndex_MASK      (0xFFUL<<MOD_ExtIndex_SHIFT)
+
 /* Operand types.  These are more detailed than the "general" types for all
  * architectures, as they include the size, for instance.
  * Bit Breakdown (from LSB to MSB):
@@ -1615,17 +1627,37 @@ x86_new_insn(const unsigned long data[4], int num_operands,
 
     if (!found) {
        /* Didn't find a matching one */
-       /* FIXME: This needs to be more descriptive of certain reasons for a
-        * mismatch.  E.g.:
-        *  "mismatch in operand sizes"
-        *  "operand size not specified"
-        * etc.  This will probably require adding dummy error catchers in the
-        * insn list which are only looked at if we get here.
-        */
        Error(_("invalid combination of opcode and operands"));
        return NULL;
     }
 
+    /* Extended error/warning handling */
+    switch (info->modifiers & MOD_Ext_MASK) {
+       case MOD_ExtNone:
+           /* No extended modifier, so just continue */
+           break;
+       case MOD_ExtErr:
+           switch ((info->modifiers & MOD_ExtIndex_MASK)>>MOD_ExtIndex_SHIFT) {
+               case 0:
+                   Error(_("mismatch in operand sizes"));
+                   break;
+               case 1:
+                   Error(_("operand size not specified"));
+                   break;
+               default:
+                   InternalError(_("unrecognized x86 ext mod index"));
+           }
+           return NULL;    /* It was an error */
+       case MOD_ExtWarn:
+           switch ((info->modifiers & MOD_ExtIndex_MASK)>>MOD_ExtIndex_SHIFT) {
+               default:
+                   InternalError(_("unrecognized x86 ext mod index"));
+           }
+           break;
+       default:
+           InternalError(_("unrecognized x86 extended modifier"));
+    }
+
     /* Shortcut to JmpRel */
     if (operands && (info->operands[0] & OPA_MASK) == OPA_JmpRel)
        return x86_new_jmprel(data, num_operands, operands, info, cur_section,