]> granicus.if.org Git - llvm/commitdiff
[MCA] Correctly update the UsedResourceGroups mask in the InstrBuilder.
authorAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Tue, 26 Mar 2019 15:38:37 +0000 (15:38 +0000)
committerAndrea Di Biagio <Andrea_DiBiagio@sn.scee.net>
Tue, 26 Mar 2019 15:38:37 +0000 (15:38 +0000)
Found by inspection when looking at the debug output of MCA.
This problem was latent, and none of the upstream models were affected by it.
No functional change intended.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357000 91177308-0d34-0410-b5e6-96231b3b80d8

include/llvm/MCA/Stages/DispatchStage.h
lib/MCA/InstrBuilder.cpp
lib/MCA/Stages/DispatchStage.cpp
tools/llvm-mca/Views/SummaryView.cpp
tools/llvm-mca/llvm-mca.cpp

index e39f03e3263b0f322f2c72184065ef7d6b9af88c..d80ededeaca14686d0d3a04ad5910a452eeb16b8 100644 (file)
@@ -68,9 +68,7 @@ class DispatchStage final : public Stage {
 public:
   DispatchStage(const MCSubtargetInfo &Subtarget, const MCRegisterInfo &MRI,
                 unsigned MaxDispatchWidth, RetireControlUnit &R,
-                RegisterFile &F)
-      : DispatchWidth(MaxDispatchWidth), AvailableEntries(MaxDispatchWidth),
-        CarryOver(0U), CarriedOver(), STI(Subtarget), RCU(R), PRF(F) {}
+                RegisterFile &F);
 
   bool isAvailable(const InstRef &IR) const override;
 
index e10efb28f77531e03ccb5f4c0032621cd749411d..89904e75cc1528bd86670658fa85890bc2769e15 100644 (file)
@@ -115,6 +115,7 @@ static void initializeUsedResources(InstrDesc &ID,
     } else {
       // Remove the leading 1 from the resource group mask.
       NormalizedMask ^= PowerOf2Floor(NormalizedMask);
+      UsedResourceGroups |= (A.first ^ NormalizedMask);
     }
 
     for (unsigned J = I + 1; J < E; ++J) {
index ae3d3fd6743762032d4f0743acc7c25dda9160cc..b55ac70307a47793bcb3c1eb339dfa224abe557f 100644 (file)
 namespace llvm {
 namespace mca {
 
+DispatchStage::DispatchStage(const MCSubtargetInfo &Subtarget,
+                             const MCRegisterInfo &MRI,
+                             unsigned MaxDispatchWidth, RetireControlUnit &R,
+                             RegisterFile &F)
+    : DispatchWidth(MaxDispatchWidth), AvailableEntries(MaxDispatchWidth),
+      CarryOver(0U), CarriedOver(), STI(Subtarget), RCU(R), PRF(F) {
+  if (!DispatchWidth)
+    DispatchWidth = Subtarget.getSchedModel().IssueWidth;
+}
+
 void DispatchStage::notifyInstructionDispatched(const InstRef &IR,
                                                 ArrayRef<unsigned> UsedRegs,
                                                 unsigned UOps) const {
index e3d85507dc83a777c4fd27a50efaf2dc975a3712..5aa53b2df9051895c740a0de430bcd518085fe4a 100644 (file)
@@ -24,7 +24,8 @@ namespace mca {
 
 SummaryView::SummaryView(const MCSchedModel &Model, ArrayRef<MCInst> S,
                          unsigned Width, bool EmitBottleneckAnalysis)
-    : SM(Model), Source(S), DispatchWidth(Width), LastInstructionIdx(0),
+    : SM(Model), Source(S), DispatchWidth(Width?Width: Model.IssueWidth),
+      LastInstructionIdx(0),
       TotalCycles(0), NumMicroOps(0), BPI({0, 0, 0, 0, 0}),
       ResourcePressureDistribution(Model.getNumProcResourceKinds(), 0),
       ProcResourceUsage(Model.getNumProcResourceKinds(), 0),
index 17b19d1818f75712a31283b9d2075de01f419729..ce253af1fe7e7c3b6a75535a9ed328266159481e 100644 (file)
@@ -381,17 +381,13 @@ int main(int argc, char **argv) {
 
   const MCSchedModel &SM = STI->getSchedModel();
 
-  unsigned Width = SM.IssueWidth;
-  if (DispatchWidth)
-    Width = DispatchWidth;
-
   // Create an instruction builder.
   mca::InstrBuilder IB(*STI, *MCII, *MRI, MCIA.get());
 
   // Create a context to control ownership of the pipeline hardware.
   mca::Context MCA(*MRI, *STI);
 
-  mca::PipelineOptions PO(Width, RegisterFileSize, LoadQueueSize,
+  mca::PipelineOptions PO(DispatchWidth, RegisterFileSize, LoadQueueSize,
                           StoreQueueSize, AssumeNoAlias,
                           EnableBottleneckAnalysis);
 
@@ -470,7 +466,7 @@ int main(int argc, char **argv) {
 
     if (PrintSummaryView)
       Printer.addView(llvm::make_unique<mca::SummaryView>(
-          SM, Insts, Width, EnableBottleneckAnalysis));
+          SM, Insts, DispatchWidth, EnableBottleneckAnalysis));
 
     if (PrintInstructionInfoView)
       Printer.addView(