]> granicus.if.org Git - llvm/commitdiff
[DAGCombine] visitMULHS - use getScalarValueSizeInBits() to make safe for vector...
authorSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 30 Aug 2019 12:22:06 +0000 (12:22 +0000)
committerSimon Pilgrim <llvm-dev@redking.me.uk>
Fri, 30 Aug 2019 12:22:06 +0000 (12:22 +0000)
This is hidden behind a (scalar-only) isOneConstant(N1) check at the moment, but once we get around to adding vector support we need to ensure we're dealing with the scalar bitwidth, not the total.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@370468 91177308-0d34-0410-b5e6-96231b3b80d8

lib/CodeGen/SelectionDAG/DAGCombiner.cpp

index 1b98b937ca40efc05c7135dfe614614031360d85..e22bd48fe6456f3642b4537d2c07f41cf78a167c 100644 (file)
@@ -4195,7 +4195,7 @@ SDValue DAGCombiner::visitMULHS(SDNode *N) {
   // fold (mulhs x, 1) -> (sra x, size(x)-1)
   if (isOneConstant(N1))
     return DAG.getNode(ISD::SRA, DL, N0.getValueType(), N0,
-                       DAG.getConstant(N0.getValueSizeInBits() - 1, DL,
+                       DAG.getConstant(N0.getScalarValueSizeInBits() - 1, DL,
                                        getShiftAmountTy(N0.getValueType())));
 
   // fold (mulhs x, undef) -> 0