[X86] Add test cases for missed opportunities in (x << C1) op C2 to (x op (C2>>C1...

We handle the case where the C2 does not fit in a signed 32-bit immediate, but
(C2>>C1) does. But there's also some 64-bit opportunities when C2 is not an unsigned
32-bit immediate, but (C2>>C1) is. For OR/XOR this allows us to load the
immediate with with MOV32ri instead of a movabsq. For AND it allows us to use a
32-bit AND and fold the immediate.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@357050 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/test/CodeGen/X86/narrow-shl-cst.ll b/test/CodeGen/X86/narrow-shl-cst.ll
index c0c77e0878b94ac94d032c7aa3bd294eda57c44f..d5f4b64b0a47f44223c8e82836c5fa9aa4b7fd69 100644 (file)
--- a/test/CodeGen/X86/narrow-shl-cst.ll
+++ b/test/CodeGen/X86/narrow-shl-cst.ll
@@ -162,3 +162,39 @@ define i64 @test13(i64 %x, i64* %y) nounwind {
   store i64 %shl, i64* %y
   ret i64 %shl
 }
+
+define i64 @test14(i64 %x, i64* %y) nounwind {
+; CHECK-LABEL: test14:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    shlq $8, %rdi
+; CHECK-NEXT:    movabsq $1095216660480, %rax # imm = 0xFF00000000
+; CHECK-NEXT:    andq %rdi, %rax
+; CHECK-NEXT:    retq
+  %and = shl i64 %x, 8
+  %shl = and i64 %and, 1095216660480
+  ret i64 %shl
+}
+
+define i64 @test15(i64 %x, i64* %y) nounwind {
+; CHECK-LABEL: test15:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    shlq $8, %rdi
+; CHECK-NEXT:    movabsq $1095216660480, %rax # imm = 0xFF00000000
+; CHECK-NEXT:    orq %rdi, %rax
+; CHECK-NEXT:    retq
+  %or = shl i64 %x, 8
+  %shl = or i64 %or, 1095216660480
+  ret i64 %shl
+}
+
+define i64 @test16(i64 %x, i64* %y) nounwind {
+; CHECK-LABEL: test16:
+; CHECK:       # %bb.0:
+; CHECK-NEXT:    shlq $8, %rdi
+; CHECK-NEXT:    movabsq $1095216660480, %rax # imm = 0xFF00000000
+; CHECK-NEXT:    xorq %rdi, %rax
+; CHECK-NEXT:    retq
+  %xor = shl i64 %x, 8
+  %shl = xor i64 %xor, 1095216660480
+  ret i64 %shl
+}