[X86] SimplifyDemandedVectorElts - add X86ISD::VPERMV3 mask support

Completes SimplifyDemandedVectorElts's basic variable shuffle mask support which should help D60512 + D60562

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@358186 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/Target/X86/X86ISelLowering.cpp b/lib/Target/X86/X86ISelLowering.cpp
index 6008549391361500bb801952e984969ebb3db193..2258e0ce24ee3050926a8f4447d08abfc5584001 100644 (file)
--- a/lib/Target/X86/X86ISelLowering.cpp
+++ b/lib/Target/X86/X86ISelLowering.cpp
@@ -33234,8 +33234,8 @@ bool X86TargetLowering::SimplifyDemandedVectorEltsForTargetNode(
     break;
   }
   case X86ISD::PSHUFB:
+  case X86ISD::VPERMV3:
   case X86ISD::VPERMILPV: {
-    // TODO - simplify other variable shuffle masks.
     SDValue Mask = Op.getOperand(1);
     APInt MaskUndef, MaskZero;
     if (SimplifyDemandedVectorElts(Mask, DemandedElts, MaskUndef, MaskZero, TLO,

diff --git a/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll b/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll
index b180a517032ab9df3d2941d994b311d97077545f..d796108aa5ffc341dc89cb48593b5e3f838b41ad 100644 (file)
--- a/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll
+++ b/test/CodeGen/X86/vector-shuffle-combining-avx512bw.ll
@@ -933,10 +933,8 @@ define <8 x double> @combine_vpermi2var_8f64_as_permpd(<8 x double> %x0, <8 x do
 ;
 ; X64-LABEL: combine_vpermi2var_8f64_as_permpd:
 ; X64:       # %bb.0:
-; X64-NEXT:    vmovdqa {{.*#+}} xmm2 = <u,2,1,3,4,6,5,7>
-; X64-NEXT:    vpinsrq $0, %rdi, %xmm2, %xmm2
-; X64-NEXT:    vmovdqa64 {{.*#+}} zmm3 = <u,2,1,3,4,6,5,7>
-; X64-NEXT:    vinserti32x4 $0, %xmm2, %zmm3, %zmm2
+; X64-NEXT:    vmovapd {{.*#+}} zmm2 = <u,2,1,3,4,6,5,7>
+; X64-NEXT:    vinsertf32x4 $0, {{.*}}(%rip), %zmm2, %zmm2
 ; X64-NEXT:    vpermi2pd %zmm1, %zmm0, %zmm2
 ; X64-NEXT:    vpermpd {{.*#+}} zmm0 = zmm2[2,3,1,1,6,7,5,5]
 ; X64-NEXT:    retq