]> granicus.if.org Git - llvm/commitdiff
[AArch64][SVE2] Asm: fix overlapping bit
authorCullen Rhodes <cullen.rhodes@arm.com>
Fri, 24 May 2019 08:45:37 +0000 (08:45 +0000)
committerCullen Rhodes <cullen.rhodes@arm.com>
Fri, 24 May 2019 08:45:37 +0000 (08:45 +0000)
Summary:
Bit 20 in sve2_int_arith_pred TableGen class was overlapping. The
encodings are not affected as bit 20 is defined by the opc bits
and this was overwriting the earlier error of setting bit 20 to 0.

Raised by Momchil: https://reviews.llvm.org/D62130

Reviewed By: chill

Differential Revision: https://reviews.llvm.org/D62292

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@361609 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/AArch64/SVEInstrFormats.td

index 79f2dab932f9e7260f7d1627ae52806e89f51b9b..ac4d800197b70cbf77e94e0f116132058aee8ba1 100644 (file)
@@ -2070,7 +2070,7 @@ class sve2_int_arith_pred<bits<2> sz, bits<6> opc, string asm,
   bits<5> Zdn;
   let Inst{31-24} = 0b01000100;
   let Inst{23-22} = sz;
-  let Inst{21-20} = 0b01;
+  let Inst{21}    = 0b0;
   let Inst{20-16} = opc{5-1};
   let Inst{15-14} = 0b10;
   let Inst{13}    = opc{0};