]> granicus.if.org Git - llvm/commitdiff
[X86] Remove a couple redundant isel patterns that look to have been copy/pasted...
authorCraig Topper <craig.topper@intel.com>
Thu, 3 Oct 2019 03:16:21 +0000 (03:16 +0000)
committerCraig Topper <craig.topper@intel.com>
Thu, 3 Oct 2019 03:16:21 +0000 (03:16 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@373559 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86InstrAVX512.td

index 2d3b8a556816abd5086eca9e561fd034bb389e7f..7030e3bf76efc1ff7a133c1cca897ec37d23d215 100644 (file)
@@ -5069,23 +5069,6 @@ let Predicates = [HasDQI, NoVLX] in {
              sub_xmm)>;
 }
 
-// PMULLQ: Use 512bit version to implement 128/256 bit in case NoVLX.
-let Predicates = [HasDQI, NoVLX] in {
-  def : Pat<(v4i64 (mul (v4i64 VR256X:$src1), (v4i64 VR256X:$src2))),
-            (EXTRACT_SUBREG
-                (VPMULLQZrr
-                    (INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR256X:$src1, sub_ymm),
-                    (INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR256X:$src2, sub_ymm)),
-             sub_ymm)>;
-
-  def : Pat<(v2i64 (mul (v2i64 VR128X:$src1), (v2i64 VR128X:$src2))),
-            (EXTRACT_SUBREG
-                (VPMULLQZrr
-                    (INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR128X:$src1, sub_xmm),
-                    (INSERT_SUBREG (v8i64 (IMPLICIT_DEF)), VR128X:$src2, sub_xmm)),
-             sub_xmm)>;
-}
-
 multiclass avx512_min_max_lowering<Instruction Instr, SDNode OpNode> {
   def : Pat<(v4i64 (OpNode VR256X:$src1, VR256X:$src2)),
             (EXTRACT_SUBREG