GPIO_PIN_REG_39
};
+const gpio_pu_pd_desc_t gpio_pu_pd_desc[GPIO_PIN_COUNT]={
+ {RTC_IO_TOUCH_PAD1_REG, RTC_IO_TOUCH_PAD1_RUE_M, RTC_IO_TOUCH_PAD1_RDE_M},
+ {PERIPHS_IO_MUX_U0TXD_U, FUN_PU, FUN_PD},
+ {RTC_IO_TOUCH_PAD2_REG, RTC_IO_TOUCH_PAD2_RUE_M, RTC_IO_TOUCH_PAD2_RDE_M},
+ {PERIPHS_IO_MUX_U0RXD_U, FUN_PU, FUN_PD},
+ {RTC_IO_TOUCH_PAD0_REG, RTC_IO_TOUCH_PAD0_RUE_M, RTC_IO_TOUCH_PAD0_RDE_M},
+ {PERIPHS_IO_MUX_GPIO5_U, FUN_PU, FUN_PD},
+ {PERIPHS_IO_MUX_SD_CLK_U, FUN_PU, FUN_PD},
+ {PERIPHS_IO_MUX_SD_DATA0_U, FUN_PU, FUN_PD},
+ {PERIPHS_IO_MUX_SD_DATA1_U, FUN_PU, FUN_PD},
+ {PERIPHS_IO_MUX_SD_DATA2_U, FUN_PU, FUN_PD},
+ {PERIPHS_IO_MUX_SD_DATA3_U, FUN_PU, FUN_PD},
+ {PERIPHS_IO_MUX_SD_CMD_U, FUN_PU, FUN_PD},
+ {RTC_IO_TOUCH_PAD5_REG, RTC_IO_TOUCH_PAD5_RUE_M, RTC_IO_TOUCH_PAD5_RDE_M},
+ {RTC_IO_TOUCH_PAD4_REG, RTC_IO_TOUCH_PAD4_RUE_M, RTC_IO_TOUCH_PAD4_RDE_M},
+ {RTC_IO_TOUCH_PAD6_REG, RTC_IO_TOUCH_PAD6_RUE_M, RTC_IO_TOUCH_PAD6_RDE_M},
+ {RTC_IO_TOUCH_PAD3_REG, RTC_IO_TOUCH_PAD3_RUE_M, RTC_IO_TOUCH_PAD3_RDE_M},
+ {PERIPHS_IO_MUX_GPIO16_U, FUN_PU, FUN_PD},
+ {PERIPHS_IO_MUX_GPIO17_U, FUN_PU, FUN_PD},
+ {PERIPHS_IO_MUX_GPIO18_U, FUN_PU, FUN_PD},
+ {PERIPHS_IO_MUX_GPIO19_U, FUN_PU, FUN_PD},
+ {0,0,0},
+ {PERIPHS_IO_MUX_GPIO21_U, FUN_PU, FUN_PD},
+ {PERIPHS_IO_MUX_GPIO22_U, FUN_PU, FUN_PD},
+ {PERIPHS_IO_MUX_GPIO23_U, FUN_PU, FUN_PD},
+ {0,0,0},
+ {RTC_IO_PAD_DAC1_REG, RTC_IO_PDAC1_RUE_M, RTC_IO_PDAC1_RDE_M},
+ {RTC_IO_PAD_DAC2_REG, RTC_IO_PDAC2_RUE_M, RTC_IO_PDAC2_RDE_M},
+ {RTC_IO_TOUCH_PAD7_REG, RTC_IO_TOUCH_PAD7_RUE_M, RTC_IO_TOUCH_PAD7_RDE_M},
+ {0,0,0},
+ {0,0,0},
+ {0,0,0},
+ {0,0,0},
+ {RTC_IO_XTAL_32K_PAD_REG, RTC_IO_X32P_RUE_M, RTC_IO_X32P_RDE_M},
+ {RTC_IO_XTAL_32K_PAD_REG, RTC_IO_X32N_RUE_M, RTC_IO_X32N_RDE_M},
+ {PERIPHS_IO_MUX_GPIO34_U, FUN_PU, FUN_PD},
+ {PERIPHS_IO_MUX_GPIO35_U, FUN_PU, FUN_PD},
+ {PERIPHS_IO_MUX_GPIO36_U, FUN_PU, FUN_PD},
+ {PERIPHS_IO_MUX_GPIO37_U, FUN_PU, FUN_PD},
+ {PERIPHS_IO_MUX_GPIO38_U, FUN_PU, FUN_PD},
+ {PERIPHS_IO_MUX_GPIO39_U, FUN_PU, FUN_PD}
+};
+
+
+esp_err_t gpio_pullup_en(gpio_num_t gpio_num) {
+ GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
+ REG_SET_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pu);
+ return ESP_OK;
+}
+
+esp_err_t gpio_pullup_dis(gpio_num_t gpio_num) {
+ GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
+ REG_CLR_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pu);
+ return ESP_OK;
+}
+
+esp_err_t gpio_pulldown_en(gpio_num_t gpio_num) {
+ GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
+ REG_SET_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pd);
+ return ESP_OK;
+}
+
+esp_err_t gpio_pulldown_dis(gpio_num_t gpio_num) {
+ GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
+ REG_CLR_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pd);
+ return ESP_OK;
+}
+
esp_err_t gpio_set_intr_type(gpio_num_t gpio_num, gpio_int_type_t intr_type)
{
GPIO_CHECK(GPIO_IS_VALID_GPIO(gpio_num), "GPIO number error", ESP_ERR_INVALID_ARG);
esp_err_t ret = ESP_OK;
switch(pull) {
case GPIO_PULLUP_ONLY:
- PIN_PULLUP_EN(GPIO_PIN_MUX_REG[gpio_num]);
- PIN_PULLDWN_DIS(GPIO_PIN_MUX_REG[gpio_num]);
+ REG_SET_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pu);
+ REG_CLR_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pd);
break;
case GPIO_PULLDOWN_ONLY:
- PIN_PULLUP_DIS(GPIO_PIN_MUX_REG[gpio_num]);
- PIN_PULLDWN_EN(GPIO_PIN_MUX_REG[gpio_num]);
+ REG_CLR_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pu);
+ REG_SET_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pd);
break;
case GPIO_PULLUP_PULLDOWN:
- PIN_PULLUP_EN(GPIO_PIN_MUX_REG[gpio_num]);
- PIN_PULLDWN_EN(GPIO_PIN_MUX_REG[gpio_num]);
+ REG_SET_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pu);
+ REG_SET_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pd);
break;
case GPIO_FLOATING:
- PIN_PULLUP_DIS(GPIO_PIN_MUX_REG[gpio_num]);
- PIN_PULLDWN_DIS(GPIO_PIN_MUX_REG[gpio_num]);
+ REG_CLR_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pu);
+ REG_CLR_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pd);
break;
default:
ESP_LOGE(GPIO_TAG, "Unknown pull up/down mode,gpio_num=%u,pull=%u",gpio_num,pull);
}
if(pGPIOConfig->pull_up_en) {
pu_en = 1;
- PIN_PULLUP_EN(io_reg);
+ REG_SET_BIT(gpio_pu_pd_desc[io_num].reg, gpio_pu_pd_desc[io_num].pd);
} else {
- PIN_PULLUP_DIS(io_reg);
+ REG_CLR_BIT(gpio_pu_pd_desc[io_num].reg, gpio_pu_pd_desc[io_num].pd);
}
if(pGPIOConfig->pull_down_en) {
pd_en = 1;
- PIN_PULLDWN_EN(io_reg);
+ REG_SET_BIT(gpio_pu_pd_desc[io_num].reg, gpio_pu_pd_desc[io_num].pd);
} else {
- PIN_PULLDWN_DIS(io_reg);
+ REG_CLR_BIT(gpio_pu_pd_desc[io_num].reg, gpio_pu_pd_desc[io_num].pd);
}
ESP_LOGI(GPIO_TAG, "GPIO[%d]| InputEn: %d| OutputEn: %d| OpenDrain: %d| Pullup: %d| Pulldown: %d| Intr:%d ", io_num, input_en, output_en, od_en, pu_en, pd_en, pGPIOConfig->intr_type);
gpio_set_intr_type(io_num, pGPIOConfig->intr_type);
#define GPIO_IS_VALID_GPIO(gpio_num) ((gpio_num < GPIO_PIN_COUNT && GPIO_PIN_MUX_REG[gpio_num] != 0)) //to decide whether it is a valid GPIO number
#define GPIO_IS_VALID_OUTPUT_GPIO(gpio_num) ((GPIO_IS_VALID_GPIO(gpio_num)) && (gpio_num < 34)) //to decide whether it can be a valid GPIO number of output mode
+typedef struct {
+ uint32_t reg; /*!< Register to modify to enable or disable pullups or pulldowns */
+ uint32_t pu; /*!< Bit to set or clear in the above register to enable or disable the pullup, respectively */
+ uint32_t pd; /*!< Bit to set or clear in the above register to enable or disable the pulldown, respectively */
+} gpio_pu_pd_desc_t;
+
+
+/**
+ * Per-GPIO pullup/pulldown information
+ * On the ESP32, some GPIOs need their pullups and pulldowns enabled and disabled in the RTC
+ * peripheral instead of in the GPIO peripheral. This array documents for every GPIO what bit
+ * to set or clear.
+ *
+ * This array is non-static, so if you need a very quick way of toggling the pull-up/downs, you can just
+ * do e.g. REG_SET_BIT(gpio_pu_pd_desc[gpio_num].reg, gpio_pu_pd_desc[gpio_num].pu); inline.
+ *
+ * ToDo: Functions using the contents of this array will do a read/modify/write on GPIO as well as RTC
+ * registers. We may need to look into muxes/locks for other code that accesses these RTC registers when we
+ * write drivers for the RTC stuff.
+ */
+extern const gpio_pu_pd_desc_t gpio_pu_pd_desc[GPIO_PIN_COUNT];
+
+
typedef enum {
GPIO_NUM_0 = 0, /*!< GPIO0, input and output */
GPIO_NUM_1 = 1, /*!< GPIO1, input and output */
/**
* @brief GPIO set interrupt trigger type
*
- * @param gpio_num GPIO number. If you want to set output level of GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ * @param gpio_num GPIO number. If you want to set the trigger type of e.g. of GPIO16, gpio_num should be GPIO_NUM_16 (16);
* @param intr_type Interrupt type, select from gpio_int_type_t
*
* @return
/**
* @brief Enable GPIO module interrupt signal
*
- * @param gpio_num GPIO number. If you want to set output level of GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ * @param gpio_num GPIO number. If you want to enable an interrupt on e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
*
* @return
* - ESP_OK Success
/**
* @brief Disable GPIO module interrupt signal
*
- * @param gpio_num GPIO number. If you want to set output level of GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ * @param gpio_num GPIO number. If you want to disable the interrupt of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
*
* @return
* - ESP_OK success
/**
* @brief GPIO set output level
*
- * @param gpio_num GPIO number. If you want to set output level of GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ * @param gpio_num GPIO number. If you want to set the output level of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
* @param level Output level. 0: low ; 1: high
*
* @return
/**
* @brief GPIO get input level
*
- * @param gpio_num GPIO number. If you want to get level of pin GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ * @param gpio_num GPIO number. If you want to get the logic level of e.g. pin GPIO16, gpio_num should be GPIO_NUM_16 (16);
*
* @return
* - 0 the GPIO input level is 0
*
* Configure GPIO direction,such as output_only,input_only,output_and_input
*
- * @param gpio_num Configure GPIO pins number, it should be GPIO number. If you want to set direction of GPIO16, gpio_num should be GPIO_NUM_16 (16);
+ * @param gpio_num Configure GPIO pins number, it should be GPIO number. If you want to set direction of e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
* @param mode GPIO direction
*
* @return
*
* User this Function,configure GPIO pull mode,such as pull-up,pull-down
*
- * @param gpio_num GPIO number. If you want to set pull up or down mode for GPIO16,gpio_num should be GPIO_NUM_16 (16);
+ * @param gpio_num GPIO number. If you want to set pull up or down mode for e.g. GPIO16, gpio_num should be GPIO_NUM_16 (16);
* @param pull GPIO pull up/down mode.
*
* @return
*/
esp_err_t gpio_isr_register(uint32_t gpio_intr_num, void (*fn)(void*), void * arg);
+
+
+/**
+ * @brief Enable pull-up on GPIO.
+ *
+ * @param gpio_num GPIO number
+ *
+ * @return
+ * - ESP_OK Success
+ * - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t gpio_pullup_en(gpio_num_t gpio_num);
+
+/**
+ * @brief Disable pull-up on GPIO.
+ *
+ * @param gpio_num GPIO number
+ *
+ * @return
+ * - ESP_OK Success
+ * - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t gpio_pullup_dis(gpio_num_t gpio_num);
+
+/**
+ * @brief Enable pull-down on GPIO.
+ *
+ * @param gpio_num GPIO number
+ *
+ * @return
+ * - ESP_OK Success
+ * - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t gpio_pulldown_en(gpio_num_t gpio_num);
+
+/**
+ * @brief Disable pull-down on GPIO.
+ *
+ * @param gpio_num GPIO number
+ *
+ * @return
+ * - ESP_OK Success
+ * - ESP_ERR_INVALID_ARG Parameter error
+ */
+esp_err_t gpio_pulldown_dis(gpio_num_t gpio_num);
+
+
/**
* *************** ATTENTION ********************/
/**
#define PIN_INPUT_ENABLE(PIN_NAME) SET_PERI_REG_MASK(PIN_NAME,FUN_IE)
#define PIN_INPUT_DISABLE(PIN_NAME) CLEAR_PERI_REG_MASK(PIN_NAME,FUN_IE)
#define PIN_SET_DRV(PIN_NAME, drv) REG_SET_FIELD(PIN_NAME, FUN_DRV, (drv));
-#define PIN_PULLUP_DIS(PIN_NAME) REG_CLR_BIT(PIN_NAME, FUN_PU)
-#define PIN_PULLUP_EN(PIN_NAME) REG_SET_BIT(PIN_NAME, FUN_PU)
-#define PIN_PULLDWN_DIS(PIN_NAME) REG_CLR_BIT(PIN_NAME, FUN_PD)
-#define PIN_PULLDWN_EN(PIN_NAME) REG_SET_BIT(PIN_NAME, FUN_PD)
+
+/*
+ * @attention
+ * The PIN_PULL[UP|DWN]_[EN|DIS]() functions used to exist as macros in previous SDK versions.
+ * Unfortunately, however, they do not work for some GPIOs on the ESP32 chip, which needs pullups
+ * and -downs turned on and off through RTC registers. The functions still exist for compatibility
+ * with older code, but are marked as deprecated in order to generate a warning.
+ * Please replace them in this fashion: (make sure to include driver/gpio.h as well)
+ * PIN_PULLUP_EN(GPIO_PIN_MUX_REG[x]) -> gpio_pullup_en(x)
+ * PIN_PULLUP_DIS(GPIO_PIN_MUX_REG[x]) -> gpio_pullup_dis(x)
+ * PIN_PULLDWN_EN(GPIO_PIN_MUX_REG[x]) -> gpio_pulldown_en(x)
+ * PIN_PULLDWN_DIS(GPIO_PIN_MUX_REG[x]) -> gpio_pulldown_dis(x)
+ *
+*/
+static inline void __attribute__ ((deprecated)) PIN_PULLUP_DIS(uint32_t PIN_NAME)
+{
+ REG_CLR_BIT(PIN_NAME, FUN_PU);
+}
+
+static inline void __attribute__ ((deprecated)) PIN_PULLUP_EN(uint32_t PIN_NAME)
+{
+ REG_SET_BIT(PIN_NAME, FUN_PU);
+}
+
+static inline void __attribute__ ((deprecated)) PIN_PULLDWN_DIS(uint32_t PIN_NAME)
+{
+ REG_CLR_BIT(PIN_NAME, FUN_PD);
+}
+
+static inline void __attribute__ ((deprecated)) PIN_PULLDWN_EN(uint32_t PIN_NAME)
+{
+ REG_SET_BIT(PIN_NAME, FUN_PD);
+}
+
+
#define PIN_FUNC_SELECT(PIN_NAME, FUNC) REG_SET_FIELD(PIN_NAME, MCU_SEL, FUNC)
#define PIN_FUNC_GPIO 2
projects / esp-idf / commitdiff