]> granicus.if.org Git - clang/commitdiff
[Clang][Intrinsics][AVX512][BuiltIn] adding intrinsics for vrangesd instruction set
authorMichael Zuckerman <Michael.zuckerman@intel.com>
Thu, 30 Jun 2016 08:05:46 +0000 (08:05 +0000)
committerMichael Zuckerman <Michael.zuckerman@intel.com>
Thu, 30 Jun 2016 08:05:46 +0000 (08:05 +0000)
Differential Revision: http://reviews.llvm.org/D21734

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@274218 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Headers/avx512dqintrin.h
test/CodeGen/avx512dq-builtins.c

index 19514cf489a2c5d67c89201272ac9ebc9ebb15ef..13665e4c6668ea28d424a76232d0a5df2b54c63c 100644 (file)
@@ -792,6 +792,8 @@ _mm512_maskz_cvtepu64_ps (__mmask8 __U, __m512i __A) {
                                                (__mmask8) -1, (int)(C),\
                                                (int)(R)); })
 
+#define _mm_range_ss(A ,B , C) _mm_range_round_ss(A, B, C ,_MM_FROUND_CUR_DIRECTION)
+
 #define _mm_mask_range_round_ss(W, U, A, B, C, R) __extension__ ({ \
   (__m128)__builtin_ia32_rangess128_round_mask((__v4sf)(__m128)(A), \
                                                (__v4sf)(__m128)(B), \
@@ -799,6 +801,8 @@ _mm512_maskz_cvtepu64_ps (__mmask8 __U, __m512i __A) {
                                                (__mmask8)(U), (int)(C),\
                                                (int)(R)); })
 
+#define _mm_mask_range_ss(W , U, A, B, C) _mm_mask_range_round_ss(W, U, A, B, C , _MM_FROUND_CUR_DIRECTION)
+
 #define _mm_maskz_range_round_ss(U, A, B, C, R) __extension__ ({ \
   (__m128)__builtin_ia32_rangess128_round_mask((__v4sf)(__m128)(A), \
                                                (__v4sf)(__m128)(B), \
@@ -806,6 +810,8 @@ _mm512_maskz_cvtepu64_ps (__mmask8 __U, __m512i __A) {
                                                (__mmask8)(U), (int)(C),\
                                                (int)(R)); })
 
+#define _mm_maskz_range_ss(U, A ,B , C) _mm_maskz_range_round_ss(U, A, B, C ,_MM_FROUND_CUR_DIRECTION)
+
 #define _mm_range_round_sd(A, B, C, R) __extension__ ({           \
   (__m128d)__builtin_ia32_rangesd128_round_mask((__v2df)(__m128d)(A), \
                                                 (__v2df)(__m128d)(B), \
@@ -813,6 +819,8 @@ _mm512_maskz_cvtepu64_ps (__mmask8 __U, __m512i __A) {
                                                 (__mmask8) -1, (int)(C),\
                                                 (int)(R)); })
 
+#define _mm_range_sd(A ,B , C) _mm_range_round_sd(A, B, C ,_MM_FROUND_CUR_DIRECTION)
+
 #define _mm_mask_range_round_sd(W, U, A, B, C, R) __extension__ ({ \
   (__m128d)__builtin_ia32_rangesd128_round_mask((__v2df)(__m128d)(A), \
                                                 (__v2df)(__m128d)(B), \
@@ -820,6 +828,8 @@ _mm512_maskz_cvtepu64_ps (__mmask8 __U, __m512i __A) {
                                                 (__mmask8)(U), (int)(C),\
                                                 (int)(R)); })
 
+#define _mm_mask_range_sd(W, U, A, B, C) _mm_mask_range_round_sd(W, U, A, B, C ,_MM_FROUND_CUR_DIRECTION)
+
 #define _mm_maskz_range_round_sd(U, A, B, C, R) __extension__ ({ \
   (__m128d)__builtin_ia32_rangesd128_round_mask((__v2df)(__m128d)(A), \
                                                 (__v2df)(__m128d)(B), \
@@ -827,6 +837,8 @@ _mm512_maskz_cvtepu64_ps (__mmask8 __U, __m512i __A) {
                                                 (__mmask8)(U), (int)(C),\
                                                 (int)(R)); })
 
+#define _mm_maskz_range_sd(U, A, B, C) _mm_maskz_range_round_sd(U, A, B, C ,_MM_FROUND_CUR_DIRECTION)
+
 #define _mm512_reduce_pd(A, B) __extension__ ({             \
   (__m512d)__builtin_ia32_reducepd512_mask((__v8df)(__m512d)(A), (int)(B), \
                                            (__v8df)_mm512_setzero_pd(), \
index 78a39d71f59b59d02dae78c38d911d5c82791e91..59a7cad7e3d1027ae2b825a8fb49d49885b784d2 100644 (file)
@@ -671,6 +671,42 @@ __m128 test_mm512_maskz_range_round_ss(__mmask8 __U, __m128 __A, __m128 __B) {
   return _mm_maskz_range_round_ss(__U, __A, __B, 4, 8); 
 }
 
+__m128d test_mm_range_sd(__m128d __A, __m128d __B) {
+  // CHECK-LABEL: @test_mm_range_sd
+  // CHECK: @llvm.x86.avx512.mask.range.sd
+  return _mm_range_sd(__A, __B, 4); 
+}
+
+__m128d test_mm_mask_range_sd(__m128d __W, __mmask8 __U, __m128d __A, __m128d __B) {
+  // CHECK-LABEL: test_mm_mask_range_sd
+  // CHECK: @llvm.x86.avx512.mask.range.sd
+  return _mm_mask_range_sd(__W, __U, __A, __B, 4); 
+}
+
+__m128d test_mm_maskz_range_sd(__mmask8 __U, __m128d __A, __m128d __B) {
+  // CHECK-LABEL: @test_mm_maskz_range_sd
+  // CHECK: @llvm.x86.avx512.mask.range.sd
+  return _mm_maskz_range_sd(__U, __A, __B, 4); 
+}
+
+__m128d test_mm_range_ss(__m128d __A, __m128d __B) {
+  // CHECK-LABEL: @test_mm_range_ss
+  // CHECK: @llvm.x86.avx512.mask.range.ss
+  return _mm_range_ss(__A, __B, 4); 
+}
+
+__m128d test_mm_mask_range_ss(__m128 __W, __mmask8 __U, __m128 __A, __m128 __B) {
+  // CHECK-LABEL: @test_mm_mask_range_ss
+  // CHECK: @llvm.x86.avx512.mask.range.ss
+  return _mm_mask_range_ss(__W, __U, __A, __B, 4); 
+}
+
+__m128 test_mm_maskz_range_ss(__mmask8 __U, __m128 __A, __m128 __B) {
+  // CHECK-LABEL: @test_mm_maskz_range_ss
+  // CHECK: @llvm.x86.avx512.mask.range.ss
+  return _mm_maskz_range_ss(__U, __A, __B, 4); 
+}
+
 __m512 test_mm512_range_ps(__m512 __A, __m512 __B) {
   // CHECK-LABEL: @test_mm512_range_ps
   // CHECK: @llvm.x86.avx512.mask.range.ps.512