[Docs] Removes Subsystem Documentation page

Removes Subsystem Documentation page. Also moves existing topics on Subsystem Documentation page to User Guides and Reference pages.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@373872 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/docs/Reference.rst b/docs/Reference.rst
index 0e55be30266707985e0abf0947f25a49e78e918a..a24a8a1eade5a679300fc25b13a7d519e261fee6 100644 (file)
--- a/docs/Reference.rst
+++ b/docs/Reference.rst
@@ -10,23 +10,47 @@ LLVM and API reference documentation.
    :hidden:\r
 \r
    Atomics\r
+   BitCodeFormat\r
+   BlockFrequencyTerminology\r
+   BranchWeightMetadata\r
    Bugpoint\r
+   CFIVerify\r
    CommandGuide/index\r
    CompilerWriterInfo\r
+   Coroutines\r
+   DependenceGraphs/index\r
+   ExceptionHandling\r
    Extensions\r
+   FaultMaps\r
    FuzzingLLVM\r
    GarbageCollection\r
    GetElementPtr\r
+   GlobalISel\r
    GwpAsan\r
    HowToSetUpLLVMStyleRTTI\r
+   HowToUseAttributes\r
+   InAlloca\r
    LangRef\r
    LibFuzzer\r
+   MarkedUpDisassembly\r
+   MemorySSA\r
    MIRLangRef\r
    OptBisect\r
+   ORCv2\r
    PDB/index\r
    ScudoHardenedAllocator\r
+   SegmentedStacks\r
+   StackMaps\r
+   SpeculativeLoadHardening\r
+   SupportLibrary\r
    Statepoints\r
+   SystemLibrary\r
    TestingGuide\r
+   TransformMetadata\r
+   TypeMetadata\r
+   XRay\r
+   XRayExample\r
+   XRayFDRFormat\r
    YamlIO\r
 \r
 API Reference\r
@@ -37,6 +61,10 @@ API Reference
 \r
 `Documentation for Go bindings <http://godoc.org/llvm.org/llvm/bindings/go/llvm>`_\r
 \r
+:doc:`ORCv2`\r
+   Describes the design and implementation of the ORC APIs, including some\r
+   usage examples, and a guide for users transitioning from ORCv1 to ORCv2.\r
+\r
 LLVM Reference\r
 --------------\r
 \r
@@ -44,16 +72,32 @@ LLVM Reference
   Defines the LLVM intermediate representation and the assembly form of the\r
   different nodes.\r
 \r
+:doc:`FaultMaps`\r
+  LLVM support for folding control flow into faulting machine instructions.\r
+\r
+:doc:`InAlloca`\r
+  Description of the ``inalloca`` argument attribute.\r
+\r
 :doc:`Machine IR (MIR) Format Reference Manual <MIRLangRef>`\r
    A reference manual for the MIR serialization format, which is used to test\r
    LLVM's code generation passes.\r
 \r
+:doc:`GlobalISel`\r
+  This describes the prototype instruction selection replacement, GlobalISel.\r
+\r
 :doc:`Atomics`\r
   Information about LLVM's concurrency model.\r
 \r
+:doc:`ExceptionHandling`\r
+   This document describes the design and implementation of exception handling\r
+   in LLVM.\r
+\r
 :doc:`CompilerWriterInfo`\r
   A list of helpful links for compiler writers.\r
 \r
+:doc:`BitCodeFormat`\r
+   This describes the file format and encoding used for LLVM "bc" files.\r
+\r
 :doc:`Extensions`\r
   LLVM-specific extensions to tools and formats LLVM seeks compatibility with.\r
 \r
@@ -61,6 +105,20 @@ LLVM Reference
   How to make ``isa<>``, ``dyn_cast<>``, etc. available for clients of your\r
   class hierarchy.\r
 \r
+:doc:`BlockFrequencyTerminology`\r
+   Provides information about terminology used in the ``BlockFrequencyInfo``\r
+   analysis pass.\r
+\r
+:doc:`BranchWeightMetadata`\r
+   Provides information about Branch Prediction Information.\r
+\r
+:doc:`MemorySSA`\r
+   Information about the MemorySSA utility in LLVM, as well as how to use it.\r
+\r
+:doc:`Support Library <SupportLibrary>`\r
+   This document describes the LLVM Support Library (``lib/Support``) and\r
+   how to keep LLVM source code portable\r
+\r
 :doc:`GetElementPtr`\r
   Answers to some very frequent questions about LLVM's most frequently\r
   misunderstood instruction.\r
@@ -71,6 +129,32 @@ LLVM Reference
 :doc:`GwpAsan`\r
   A sampled heap memory error detection toolkit designed for production use.\r
 \r
+:doc:`Dependence Graphs <DependenceGraphs/index>`\r
+  A description of the design of the various dependence graphs such as\r
+  the DDG (Data Dependence Graph).\r
+\r
+:doc:`CFIVerify`\r
+  A description of the verification tool for Control Flow Integrity.\r
+\r
+:doc:`SpeculativeLoadHardening`\r
+  A description of the Speculative Load Hardening mitigation for Spectre v1.\r
+\r
+:doc:`SegmentedStacks`\r
+   This document describes segmented stacks and how they are used in LLVM.\r
+\r
+:doc:`MarkedUpDisassembly`\r
+   This document describes the optional rich disassembly output syntax.\r
+\r
+:doc:`HowToUseAttributes`\r
+  Answers some questions about the new Attributes infrastructure.\r
+\r
+:doc:`StackMaps`\r
+  LLVM support for mapping instruction addresses to the location of\r
+  values and allowing code to be patched.\r
+\r
+:doc:`Coroutines`\r
+  LLVM support for coroutines.\r
+\r
 :doc:`YamlIO`\r
    A reference guide for using LLVM's YAML I/O library.\r
 \r
@@ -122,4 +206,14 @@ Testing
    A reference manual for using the LLVM testing infrastructure.\r
 \r
 :doc:`TestSuiteGuide`\r
-  Describes how to compile and run the test-suite benchmarks.
\ No newline at end of file
+  Describes how to compile and run the test-suite benchmarks.\r
+\r
+====\r
+XRay\r
+====\r
+\r
+:doc:`XRay`\r
+  High-level documentation of how to use XRay in LLVM.\r
+\r
+:doc:`XRayExample`\r
+  An example of how to debug an application with XRay.
\ No newline at end of file

diff --git a/docs/SubsystemDocumentation.rst b/docs/SubsystemDocumentation.rst
deleted file mode 100644 (file)
index 81feb43..0000000
--- a/docs/SubsystemDocumentation.rst
+++ /dev/null
@@ -1,158 +0,0 @@
-.. _index-subsystem-docs:\r
-\r
-Subsystem Documentation\r
-=======================\r
-\r
-For API clients and LLVM developers.\r
-\r
-.. toctree::\r
-   :hidden:\r
-\r
-   AliasAnalysis\r
-   MemorySSA\r
-   BitCodeFormat\r
-   BlockFrequencyTerminology\r
-   BranchWeightMetadata\r
-   CodeGenerator\r
-   ExceptionHandling\r
-   AddingConstrainedIntrinsics\r
-   LinkTimeOptimization\r
-   SegmentedStacks\r
-   TableGenFundamentals\r
-   DebuggingJITedCode\r
-   GoldPlugin\r
-   MarkedUpDisassembly\r
-   SystemLibrary\r
-   SupportLibrary\r
-   SourceLevelDebugging\r
-   Vectorizers\r
-   HowToUseAttributes\r
-   StackMaps\r
-   InAlloca\r
-   BigEndianNEON\r
-   CoverageMappingFormat\r
-   MergeFunctions\r
-   TypeMetadata\r
-   TransformMetadata\r
-   FaultMaps\r
-   Coroutines\r
-   GlobalISel\r
-   XRay\r
-   XRayExample\r
-   XRayFDRFormat\r
-   CFIVerify\r
-   SpeculativeLoadHardening\r
-   StackSafetyAnalysis\r
-   LoopTerminology\r
-   DependenceGraphs/index\r
-\r
-:doc:`AliasAnalysis`\r
-   Information on how to write a new alias analysis implementation or how to\r
-   use existing analyses.\r
-\r
-:doc:`MemorySSA`\r
-   Information about the MemorySSA utility in LLVM, as well as how to use it.\r
-\r
-:doc:`Source Level Debugging with LLVM <SourceLevelDebugging>`\r
-   This document describes the design and philosophy behind the LLVM\r
-   source-level debugger.\r
-\r
-:doc:`Vectorizers`\r
-   This document describes the current status of vectorization in LLVM.\r
-\r
-:doc:`ExceptionHandling`\r
-   This document describes the design and implementation of exception handling\r
-   in LLVM.\r
-\r
-:doc:`AddingConstrainedIntrinsics`\r
-   Gives the steps necessary when adding a new constrained math intrinsic\r
-   to LLVM.\r
-\r
-:doc:`BitCodeFormat`\r
-   This describes the file format and encoding used for LLVM "bc" files.\r
-\r
-:doc:`Support Library <SupportLibrary>`\r
-   This document describes the LLVM Support Library (``lib/Support``) and\r
-   how to keep LLVM source code portable\r
-\r
-:doc:`LinkTimeOptimization`\r
-   This document describes the interface between LLVM intermodular optimizer\r
-   and the linker and its design\r
-\r
-:doc:`GoldPlugin`\r
-   How to build your programs with link-time optimization on Linux.\r
-\r
-:doc:`DebuggingJITedCode`\r
-   How to debug JITed code with GDB.\r
-\r
-:doc:`MCJITDesignAndImplementation`\r
-   Describes the inner workings of MCJIT execution engine.\r
-\r
-:doc:`ORCv2`\r
-   Describes the design and implementation of the ORC APIs, including some\r
-   usage examples, and a guide for users transitioning from ORCv1 to ORCv2.\r
-\r
-:doc:`BranchWeightMetadata`\r
-   Provides information about Branch Prediction Information.\r
-\r
-:doc:`BlockFrequencyTerminology`\r
-   Provides information about terminology used in the ``BlockFrequencyInfo``\r
-   analysis pass.\r
-\r
-:doc:`SegmentedStacks`\r
-   This document describes segmented stacks and how they are used in LLVM.\r
-\r
-:doc:`MarkedUpDisassembly`\r
-   This document describes the optional rich disassembly output syntax.\r
-\r
-:doc:`HowToUseAttributes`\r
-  Answers some questions about the new Attributes infrastructure.\r
-\r
-:doc:`StackMaps`\r
-  LLVM support for mapping instruction addresses to the location of\r
-  values and allowing code to be patched.\r
-\r
-:doc:`BigEndianNEON`\r
-  LLVM's support for generating NEON instructions on big endian ARM targets is\r
-  somewhat nonintuitive. This document explains the implementation and rationale.\r
-\r
-:doc:`CoverageMappingFormat`\r
-  This describes the format and encoding used for LLVM’s code coverage mapping.\r
-\r
-:doc:`MergeFunctions`\r
-  Describes functions merging optimization.\r
-\r
-:doc:`InAlloca`\r
-  Description of the ``inalloca`` argument attribute.\r
-\r
-:doc:`FaultMaps`\r
-  LLVM support for folding control flow into faulting machine instructions.\r
-\r
-:doc:`CompileCudaWithLLVM`\r
-  LLVM support for CUDA.\r
-\r
-:doc:`Coroutines`\r
-  LLVM support for coroutines.\r
-\r
-:doc:`GlobalISel`\r
-  This describes the prototype instruction selection replacement, GlobalISel.\r
-\r
-:doc:`XRay`\r
-  High-level documentation of how to use XRay in LLVM.\r
-\r
-:doc:`XRayExample`\r
-  An example of how to debug an application with XRay.\r
-\r
-:doc:`CFIVerify`\r
-  A description of the verification tool for Control Flow Integrity.\r
-\r
-:doc:`SpeculativeLoadHardening`\r
-  A description of the Speculative Load Hardening mitigation for Spectre v1.\r
-\r
-:doc:`StackSafetyAnalysis`\r
-  This document describes the design of the stack safety analysis of local\r
-  variables.\r
-\r
-:doc:`Dependence Graphs <DependenceGraphs/index>`\r
-  A description of the design of the various dependence graphs such as\r
-  the DDG (Data Dependence Graph).
\ No newline at end of file

diff --git a/docs/UserGuides.rst b/docs/UserGuides.rst
index ddb3acf6fbd781f5063981beee727fce047b82ad..5c035d1717d6a984b97819cd9657b0f5859ebbc6 100644 (file)
--- a/docs/UserGuides.rst
+++ b/docs/UserGuides.rst
@@ -12,33 +12,46 @@ intermediate LLVM representation.
 .. toctree::\r
    :hidden:\r
 \r
+   AddingConstrainedIntrinsics\r
+   AdvancedBuilds\r
+   AliasAnalysis\r
+   AMDGPUUsage\r
+   Benchmarking\r
+   BigEndianNEON\r
+   BuildingADistribution\r
    CMake\r
    CMakePrimer\r
-   AdvancedBuilds\r
+   CodeGenerator\r
+   CodeOfConduct\r
+   CommandLine\r
+   CompileCudaWithLLVM\r
+   CoverageMappingFormat\r
+   DebuggingJITedCode\r
+   Docker\r
+   ExtendingLLVM\r
+   GoldPlugin\r
    HowToBuildOnARM\r
    HowToBuildWithPGO\r
    HowToCrossCompileBuiltinsOnArm\r
    HowToCrossCompileLLVM\r
-   yaml2obj\r
+   LinkTimeOptimization\r
+   LoopTerminology\r
    MarkdownQuickstartTemplate\r
+   MergeFunctions\r
+   MCJITDesignAndImplementation\r
+   NVPTXUsage\r
    Phabricator\r
    Passes\r
-   MCJITDesignAndImplementation\r
-   ORCv2\r
-   CodeOfConduct\r
-   CompileCudaWithLLVM\r
    ReportingGuide\r
-   Benchmarking\r
-   Docker\r
-   BuildingADistribution\r
    Remarks\r
+   StackSafetyAnalysis\r
+   SourceLevelDebugging\r
+   TableGen/index\r
+   TableGenFundamentals\r
+   Vectorizers\r
    WritingAnLLVMPass\r
    WritingAnLLVMBackend\r
-   TableGen/index\r
-   NVPTXUsage\r
-   AMDGPUUsage\r
-   ExtendingLLVM\r
-   CommandLine\r
+   yaml2obj\r
 \r
 Clang\r
 -----\r
@@ -57,6 +70,9 @@ Clang
 \r
    .. __: http://clang.llvm.org/get_started.html\r
 \r
+:doc:`CoverageMappingFormat`\r
+  This describes the format and encoding used for LLVM’s code coverage mapping.\r
+\r
 LLVM Builds and Distributions\r
 -----------------------------\r
 \r
@@ -80,12 +96,37 @@ Optimizations
 :doc:`Passes`\r
    A list of optimizations and analyses implemented in LLVM.\r
 \r
+:doc:`StackSafetyAnalysis`\r
+  This document describes the design of the stack safety analysis of local\r
+  variables.\r
+\r
+:doc:`MergeFunctions`\r
+  Describes functions merging optimization.\r
+\r
+:doc:`AliasAnalysis`\r
+   Information on how to write a new alias analysis implementation or how to\r
+   use existing analyses.\r
+\r
 :doc:`LoopTerminology`\r
   A document describing Loops and associated terms as used in LLVM.\r
 \r
+:doc:`Vectorizers`\r
+   This document describes the current status of vectorization in LLVM.\r
+\r
+:doc:`LinkTimeOptimization`\r
+   This document describes the interface between LLVM intermodular optimizer\r
+   and the linker and its design\r
+\r
+:doc:`GoldPlugin`\r
+   How to build your programs with link-time optimization on Linux.\r
+\r
 :doc:`Remarks`\r
    A reference on the implementation of remarks in LLVM.\r
 \r
+:doc:`Source Level Debugging with LLVM <SourceLevelDebugging>`\r
+   This document describes the design and philosophy behind the LLVM\r
+   source-level debugger.\r
+\r
 Code Generation\r
 ---------------\r
 \r
@@ -101,6 +142,16 @@ Code Generation
    Describes the TableGen tool, which is used heavily by the LLVM code\r
    generator.\r
 \r
+===\r
+JIT\r
+===\r
+\r
+:doc:`MCJITDesignAndImplementation`\r
+   Describes the inner workings of MCJIT execution engine.\r
+\r
+:doc:`DebuggingJITedCode`\r
+   How to debug JITed code with GDB.\r
+\r
 Additional Topics\r
 -----------------\r
 \r
@@ -110,9 +161,20 @@ Additional Topics
 :doc:`ExtendingLLVM`\r
   Look here to see how to add instructions and intrinsics to LLVM.\r
 \r
+:doc:`AddingConstrainedIntrinsics`\r
+   Gives the steps necessary when adding a new constrained math intrinsic\r
+   to LLVM.\r
+\r
 :doc:`HowToCrossCompileBuiltinsOnArm`\r
    Notes on cross-building and testing the compiler-rt builtins for Arm.\r
 \r
+:doc:`BigEndianNEON`\r
+  LLVM's support for generating NEON instructions on big endian ARM targets is\r
+  somewhat nonintuitive. This document explains the implementation and rationale.\r
+\r
+:doc:`CompileCudaWithLLVM`\r
+  LLVM support for CUDA.\r
+\r
 :doc:`NVPTXUsage`\r
    This document describes using the NVPTX backend to compile GPU kernels.\r
 \r

diff --git a/docs/index.rst b/docs/index.rst
index c5ddabfe0404e5776378a6b786689b458387df20..531616d69129ccd64b35223d6d377dda54d4a8d4 100644 (file)
--- a/docs/index.rst
+++ b/docs/index.rst
@@ -55,7 +55,6 @@ Getting Started, How-tos, Developer Guides, and Tutorials.
 
    GettingStartedTutorials
    Reference
-   SubsystemDocumentation
    UserGuides
 
 :doc:`GettingStartedTutorials`
@@ -64,9 +63,6 @@ Getting Started, How-tos, Developer Guides, and Tutorials.
 :doc:`UserGuides`
   User guides and How-tos.
 
-:doc:`SubsystemDocumentation`
-  For API clients and LLVM developers.
-
 :doc:`Reference`
   LLVM and API reference documentation.