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[AArch64] Add testcase for codegen for sdiv by 2.
author
Eli Friedman
<efriedma@quicinc.com>
Thu, 5 Sep 2019 23:40:03 +0000
(23:40 +0000)
committer
Eli Friedman
<efriedma@quicinc.com>
Thu, 5 Sep 2019 23:40:03 +0000
(23:40 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@371147
91177308
-0d34-0410-b5e6-
96231b3b80d8
test/CodeGen/AArch64/sdivpow2.ll
patch
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diff --git
a/test/CodeGen/AArch64/sdivpow2.ll
b/test/CodeGen/AArch64/sdivpow2.ll
index 158a778f0e91cc9afdebf2d37b09396c880f6060..25e89176ad04f25cbaf86cb53c35064870243943 100644
(file)
--- a/
test/CodeGen/AArch64/sdivpow2.ll
+++ b/
test/CodeGen/AArch64/sdivpow2.ll
@@
-87,3
+87,22
@@
define i64 @test7(i64 %x) {
ret i64 %div
}
+define i64 @test8(i64 %x) {
+; ISEL-LABEL: test8:
+; ISEL: // %bb.0:
+; ISEL-NEXT: cmp x0, #0 // =0
+; ISEL-NEXT: cinc x8, x0, lt
+; ISEL-NEXT: asr x0, x8, #1
+; ISEL-NEXT: ret
+;
+; FAST-LABEL: test8:
+; FAST: // %bb.0:
+; FAST-NEXT: add x8, x0, #1 // =1
+; FAST-NEXT: cmp x0, #0 // =0
+; FAST-NEXT: csel x8, x8, x0, lt
+; FAST-NEXT: asr x0, x8, #1
+; FAST-NEXT: ret
+ %div = sdiv i64 %x, 2
+ ret i64 %div
+}
+