Handle arbitrary whitespace in the target attribute support.

This allows us to deal a bit more gracefully with inclusions done
by macros, token pasting, or just code layout/formatting.

git-svn-id: https://llvm.org/svn/llvm-project/cfe/trunk@241525 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/lib/CodeGen/CGCall.cpp b/lib/CodeGen/CGCall.cpp
index 0535c05da5d52aacde9a1ae17adc09ae94ffd540..ac014d3220a938598ac91dc3b61499b7c35fed60 100644 (file)
--- a/lib/CodeGen/CGCall.cpp
+++ b/lib/CodeGen/CGCall.cpp
@@ -1514,9 +1514,13 @@ void CodeGenModule::ConstructAttributeList(const CGFunctionInfo &FI,
         // Grab the various features and prepend a "+" to turn on the feature to
         // the backend and add them to our existing set of features.
         for (auto &Feature : AttrFeatures) {
+         // Go ahead and trim whitespace rather than either erroring or
+         // accepting it weirdly.
+         Feature = Feature.trim();
+
           // While we're here iterating check for a different target cpu.
           if (Feature.startswith("arch="))
-            TargetCPU = Feature.split("=").second;
+            TargetCPU = Feature.split("=").second.trim();
          else if (Feature.startswith("tune="))
            // We don't support cpu tuning this way currently.
            ;

diff --git a/test/CodeGen/attr-target.c b/test/CodeGen/attr-target.c
index 7ea5fe5a07a0ef4ce2c2984fccaab57dd2b44d2c..d805d133f365f5cf859d92f19f6c7457d4eb35f4 100644 (file)
--- a/test/CodeGen/attr-target.c
+++ b/test/CodeGen/attr-target.c
@@ -13,6 +13,8 @@ int __attribute__((target("sse4"))) panda(int a) { return 4; }
 
 int bar(int a) { return baz(a) + foo(a); }
 
+int __attribute__((target("avx,      sse4.2,      arch=   ivybridge"))) qux(int a) { return 4; }
+
 // Check that we emit the additional subtarget and cpu features for foo and not for baz or bar.
 // CHECK: baz{{.*}} #0
 // CHECK: foo{{.*}} #1
@@ -22,6 +24,7 @@ int bar(int a) { return baz(a) + foo(a); }
 // CHECK: koala{{.*}} #0
 // CHECK: echidna{{.*}} #2
 // CHECK: bar{{.*}} #0
+// CHECK: qux{{.*}} #1
 // CHECK: #0 = {{.*}}"target-cpu"="x86-64" "target-features"="+sse,+sse2"
 // CHECK: #1 = {{.*}}"target-cpu"="ivybridge" "target-features"="+avx,+sse,+sse2,+sse3,+sse4.1,+sse4.2,+ssse3"
 // CHECK: #2 = {{.*}}"target-cpu"="x86-64" "target-features"="+sse,-aes,-avx,-avx2,-avx512bw,-avx512cd,-avx512dq,-avx512er,-avx512f,-avx512pf,-avx512vl,-f16c,-fma,-fma4,-pclmul,-sha,-sse2,-sse3,-sse4.1,-sse4.2,-sse4a,-ssse3,-xop"