[globalisel][knownbits] Allow targets to call GISelKnownBits::computeKnownBitsImpl()

Summary:
It seems we missed that the target hook can't query the known-bits for the
inputs to a target instruction. Fix that oversight

Reviewers: aditya_nandakumar

Subscribers: rovka, hiraditya, volkan, Petar.Avramovic, llvm-commits

Tags: #llvm

Differential Revision: https://reviews.llvm.org/D67380

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@373264 91177308-0d34-0410-b5e6-96231b3b80d8

diff --git a/include/llvm/CodeGen/TargetLowering.h b/include/llvm/CodeGen/TargetLowering.h
index 0e9c19a2597a494f2e0ef1a4e9da0616ea240198..4037587b2497f30f7b47a47e9202a5c1a3789bce 100644 (file)
--- a/include/llvm/CodeGen/TargetLowering.h
+++ b/include/llvm/CodeGen/TargetLowering.h
@@ -73,6 +73,7 @@ class Constant;
 class FastISel;
 class FunctionLoweringInfo;
 class GlobalValue;
+class GISelKnownBits;
 class IntrinsicInst;
 struct KnownBits;
 class LLVMContext;
@@ -3167,7 +3168,8 @@ public:
   /// or one and return them in the KnownZero/KnownOne bitsets. The DemandedElts
   /// argument allows us to only collect the known bits that are shared by the
   /// requested vector elements. This is for GISel.
-  virtual void computeKnownBitsForTargetInstr(Register R, KnownBits &Known,
+  virtual void computeKnownBitsForTargetInstr(GISelKnownBits &Analysis,
+                                              Register R, KnownBits &Known,
                                               const APInt &DemandedElts,
                                               const MachineRegisterInfo &MRI,
                                               unsigned Depth = 0) const;

diff --git a/lib/CodeGen/GlobalISel/GISelKnownBits.cpp b/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
index c0391f7771f8ee8ba65e1be8162f5a2400771de1..8f9b7ddeabf20eb7d5fd10184d2c1940e99e0d06 100644 (file)
--- a/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
+++ b/lib/CodeGen/GlobalISel/GISelKnownBits.cpp
@@ -119,7 +119,8 @@ void GISelKnownBits::computeKnownBitsImpl(Register R, KnownBits &Known,
 
   switch (Opcode) {
   default:
-    TL.computeKnownBitsForTargetInstr(R, Known, DemandedElts, MRI, Depth);
+    TL.computeKnownBitsForTargetInstr(*this, R, Known, DemandedElts, MRI,
+                                      Depth);
     break;
   case TargetOpcode::COPY: {
     MachineOperand Dst = MI.getOperand(0);

diff --git a/lib/CodeGen/SelectionDAG/TargetLowering.cpp b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
index d7286a2789b744e3d7991afe0c9a8fec323ff465..09c45f644e13bc51e241b540b60b8d7b7513d3bd 100644 (file)
--- a/lib/CodeGen/SelectionDAG/TargetLowering.cpp
+++ b/lib/CodeGen/SelectionDAG/TargetLowering.cpp
@@ -2589,8 +2589,9 @@ void TargetLowering::computeKnownBitsForTargetNode(const SDValue Op,
 }
 
 void TargetLowering::computeKnownBitsForTargetInstr(
-    Register R, KnownBits &Known, const APInt &DemandedElts,
-    const MachineRegisterInfo &MRI, unsigned Depth) const {
+    GISelKnownBits &Analysis, Register R, KnownBits &Known,
+    const APInt &DemandedElts, const MachineRegisterInfo &MRI,
+    unsigned Depth) const {
   Known.resetAll();
 }