QSV: showing CPU details/name and added CPU microarchitecture recognition

git-svn-id: svn://svn.handbrake.fr/HandBrake/branches/qsv@5502 b64f7644-9d1e-0410-96f1-a4d463321fa5

diff --git a/libhb/decavcodec.c b/libhb/decavcodec.c
index beece1b9bdc774e0e19b8fcd21cf34390f8127ca..edb39ec3f4213ca04ea610cd53bd87cbb79be673 100644 (file)
--- a/libhb/decavcodec.c
+++ b/libhb/decavcodec.c
@@ -1105,7 +1105,7 @@ static int decavcodecvInit( hb_work_object_t * w, hb_job_t * job )
 
 #ifdef USE_QSV
     if(job){
-        qsv_param_set_defaults(&pv->qsv_config);
+        qsv_param_set_defaults(&pv->qsv_config,hb_qsv_info_get(job->h));
 
         hb_dict_t * qsv_opts = NULL;
         if( job->advanced_opts != NULL && *job->advanced_opts != '\0' )

diff --git a/libhb/enc_qsv.c b/libhb/enc_qsv.c
index 8aa7d5069153553515a6e4748d8737bba1f0452f..ccead8a9ecc50839ff48cd40365e3583e4296a32 100644 (file)
--- a/libhb/enc_qsv.c
+++ b/libhb/enc_qsv.c
@@ -232,7 +232,7 @@ int qsv_enc_init( av_qsv_context* qsv, hb_work_private_t * pv ){
     AV_QSV_ZERO_MEMORY(qsv_encode->m_mfxVideoParam);
     AV_QSV_ZERO_MEMORY(qsv_encode->m_mfxVideoParam.mfx);
 
-    qsv_param_set_defaults(&pv->qsv_config);
+    qsv_param_set_defaults(&pv->qsv_config,hb_qsv_info_get(job->h));
 
     hb_dict_t *qsv_opts_dict = NULL;
     if( job->advanced_opts != NULL && *job->advanced_opts != '\0' )
@@ -1059,7 +1059,7 @@ int qsv_param_parse( av_qsv_config* config, const char *name, const char *value)
     return ret;
 }
 
-void qsv_param_set_defaults( av_qsv_config* config){
+void qsv_param_set_defaults( av_qsv_config* config, hb_qsv_info_t *qsv_info ){
     if(!config)
         return;
 

diff --git a/libhb/enc_qsv.h b/libhb/enc_qsv.h
index 992ccaa53b5fe76edb13de8150dbaf2e9bbbcb99..c5c5fc735b480b667f68ce990bf4fa786242bfad 100644 (file)
--- a/libhb/enc_qsv.h
+++ b/libhb/enc_qsv.h
@@ -59,6 +59,6 @@ typedef enum {
 } qsv_param_errors;
 
 int qsv_param_parse( av_qsv_config* config, const char *name, const char *value);
-void qsv_param_set_defaults( av_qsv_config* config);
+void qsv_param_set_defaults( av_qsv_config* config, hb_qsv_info_t *qsv_info );
 
-#endif //ENC_QSV_H
\ No newline at end of file
+#endif //ENC_QSV_H

diff --git a/libhb/hb.c b/libhb/hb.c
index 507a1279d86f172cd113f296f7c68820e7732087..8d69b134ebedab6deb74adb902340d46e5b1f2de 100644 (file)
--- a/libhb/hb.c
+++ b/libhb/hb.c
@@ -12,6 +12,7 @@
 #include <stdio.h>
 #include <unistd.h>
 #include <fcntl.h>
+#include "libavutil/cpu.h"
 
 #if defined( SYS_MINGW )
 #include <io.h>
@@ -410,6 +411,44 @@ static void hb_qsv_info_init(hb_qsv_info_t *qsv_info)
         qsv_info->features |= HB_QSV_FEATURE_CODEC_OPTIONS_2;
     }
 
+    // if running IA
+    if( av_get_cpu_flags() & AV_CPU_FLAG_SSE )
+    {
+        int eax, ebx, ecx, edx;
+        int family = 0, model = 0;
+
+        // cpu fma check
+        ff_cpu_cpuid(1, &eax, &ebx, &ecx, &edx);
+        family = ((eax >> 8) & 0xf) + ((eax >> 20) & 0xff);
+        model  = ((eax >> 4) & 0xf) + ((eax >> 12) & 0xf0);
+
+        ff_cpu_cpuid(0x80000000, &eax, &ebx, &ecx, &edx);
+        if( (eax & 0x80000004) < 0x80000004 )
+        {
+            int offset = 0;
+            ff_cpu_cpuid(0x80000002, &qsv_info->cpu_name[offset], &qsv_info->cpu_name[offset+4], &qsv_info->cpu_name[offset+8], &qsv_info->cpu_name[offset+12]);
+            offset += 16;
+            ff_cpu_cpuid(0x80000003, &qsv_info->cpu_name[offset], &qsv_info->cpu_name[offset+4], &qsv_info->cpu_name[offset+8], &qsv_info->cpu_name[offset+12]);
+            offset += 16;
+            ff_cpu_cpuid(0x80000004, &qsv_info->cpu_name[offset], &qsv_info->cpu_name[offset+4], &qsv_info->cpu_name[offset+8], &qsv_info->cpu_name[offset+12]);
+        }
+
+        if( family == 0x06 )
+            if( model == 0x3C ||
+                model == 0x45 )
+                qsv_info->cpu_details = HB_CPU_PLATFORM_INTEL_HSW;
+
+        if( family == 0x06 )
+            if( model == 0x3A ||
+                model == 0x3E )
+                qsv_info->cpu_details = HB_CPU_PLATFORM_INTEL_IVB;
+
+        if( family == 0x06 )
+            if( model == 0x2A ||
+                model == 0x2D )
+                qsv_info->cpu_details = HB_CPU_PLATFORM_INTEL_SNB;
+    }
+
     // note: we pass a pointer to MFXInit but it never gets modified
     //       let's make sure of it just to be safe though
     if (qsv_info->minimum_version.Major != HB_QSV_MINVERSION_MAJOR ||

diff --git a/libhb/hb.h b/libhb/hb.h
index 35b091bb136e740d31c010038a8262cc5f842dbb..e1e27df1bd088967370ab6c894074619ca046d55 100644 (file)
--- a/libhb/hb.h
+++ b/libhb/hb.h
@@ -162,6 +162,18 @@ typedef struct hb_qsv_info_s
 #define HB_QSV_FEATURE_DECODE_TIMESTAMPS 0x0000001
 #define HB_QSV_FEATURE_CODEC_OPTIONS_2   0x0000002 // see mfxExtCodingOption2
 
+    // if a feature depend on cpu
+    char    cpu_name[48];
+
+enum
+{
+    // list of microarchitecture codenames
+    HB_CPU_PLATFORM_INTEL_SNB = 1,
+    HB_CPU_PLATFORM_INTEL_IVB,
+    HB_CPU_PLATFORM_INTEL_HSW,
+};
+    int     cpu_details;
+
     // TODO: add available decoders, filters, encoders,
     //       maximum decode and encode resolution, etc.
 } hb_qsv_info_t;

diff --git a/libhb/qsv_filter.c b/libhb/qsv_filter.c
index 299f698fdffb5014b2ed5cfa9cf124ba22d56132..c7845e878e338e023ef1a3d9b3fbf79ac6bf8f3c 100644 (file)
--- a/libhb/qsv_filter.c
+++ b/libhb/qsv_filter.c
@@ -111,7 +111,7 @@ static int filter_init( av_qsv_context* qsv, hb_filter_private_t * pv ){
     av_qsv_add_context_usage(qsv,HAVE_THREADS);
 
 
-    qsv_param_set_defaults(&pv->qsv_config);
+    qsv_param_set_defaults(&pv->qsv_config,hb_qsv_info_get(pv->job->h));
     hb_dict_t * qsv_opts = NULL;
     if( pv->job->advanced_opts != NULL && *pv->job->advanced_opts != '\0' )
         qsv_opts = hb_encopts_to_dict( pv->job->advanced_opts, pv->job->vcodec );

diff --git a/test/test.c b/test/test.c
index cc690d8d92a0a32362d28cac38818812e715244f..44a429141ce2c1560212ef0efef84f1eddefbafc 100644 (file)
--- a/test/test.c
+++ b/test/test.c
@@ -707,6 +707,12 @@ static int HandleEvents( hb_handle_t * h )
                             qsv_info->minimum_version.Major,
                             qsv_info->minimum_version.Minor);
                 }
+
+                fprintf(stderr,
+                        "  - hardware details: %s%s\n", qsv_info->cpu_name,
+                                                qsv_info->cpu_details & HB_CPU_PLATFORM_INTEL_HSW ?
+                                                "/Fourth Generation Intel Core Processor":
+                                                "" );
             }
 #endif