]> granicus.if.org Git - llvm/commitdiff
[X86] Replace a couple hardcoded '5's with X86::AddrNumOperands for readability. NFC
authorCraig Topper <craig.topper@intel.com>
Wed, 21 Aug 2019 22:40:07 +0000 (22:40 +0000)
committerCraig Topper <craig.topper@intel.com>
Wed, 21 Aug 2019 22:40:07 +0000 (22:40 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@369598 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86ExpandPseudo.cpp

index f0da7b143abb95b9684d317287eeb4ec062e8337..f11218ca2a422eeb6526a35dbf96dedb10bcb58d 100644 (file)
@@ -194,7 +194,8 @@ bool X86ExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
   case X86::TCRETURNmi64: {
     bool isMem = Opcode == X86::TCRETURNmi || Opcode == X86::TCRETURNmi64;
     MachineOperand &JumpTarget = MBBI->getOperand(0);
-    MachineOperand &StackAdjust = MBBI->getOperand(isMem ? 5 : 1);
+    MachineOperand &StackAdjust = MBBI->getOperand(isMem ? X86::AddrNumOperands
+                                                         : 1);
     assert(StackAdjust.isImm() && "Expecting immediate value.");
 
     // Adjust stack pointer.
@@ -259,7 +260,7 @@ bool X86ExpandPseudo::ExpandMI(MachineBasicBlock &MBB,
                         ? X86::TAILJMPm
                         : (IsWin64 ? X86::TAILJMPm64_REX : X86::TAILJMPm64);
       MachineInstrBuilder MIB = BuildMI(MBB, MBBI, DL, TII->get(Op));
-      for (unsigned i = 0; i != 5; ++i)
+      for (unsigned i = 0; i != X86::AddrNumOperands; ++i)
         MIB.add(MBBI->getOperand(i));
     } else if (Opcode == X86::TCRETURNri64) {
       JumpTarget.setIsKill();