]> granicus.if.org Git - llvm/commitdiff
Start using shouldAssumeDSOLocal on Hexagon.
authorRafael Espindola <rafael.espindola@gmail.com>
Wed, 22 Jun 2016 19:09:14 +0000 (19:09 +0000)
committerRafael Espindola <rafael.espindola@gmail.com>
Wed, 22 Jun 2016 19:09:14 +0000 (19:09 +0000)
Include a token test showing that access to private is now the same as
to internal.

git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@273457 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/Hexagon/HexagonISelLowering.cpp
test/CodeGen/Hexagon/pic-local.ll [new file with mode: 0644]

index 1d23a74d984569c76f848efe40b3b5222f5c67e8..bd36978c4364f0f3f15e214ec86e86a28d0f0c80 100644 (file)
@@ -17,6 +17,7 @@
 #include "HexagonSubtarget.h"
 #include "HexagonTargetMachine.h"
 #include "HexagonTargetObjectFile.h"
+#include "llvm/CodeGen/Analysis.h"
 #include "llvm/CodeGen/CallingConvLower.h"
 #include "llvm/CodeGen/MachineFrameInfo.h"
 #include "llvm/CodeGen/MachineFunction.h"
@@ -1503,8 +1504,8 @@ HexagonTargetLowering::LowerGLOBALADDRESS(SDValue Op, SelectionDAG &DAG) const {
     return DAG.getNode(HexagonISD::CONST32, dl, PtrVT, GA);
   }
 
-  bool UsePCRel = GV->hasInternalLinkage() || GV->hasHiddenVisibility() ||
-                  (GV->hasLocalLinkage() && !isa<Function>(GV));
+  const Triple &TargetTriple = HTM.getTargetTriple();
+  bool UsePCRel = shouldAssumeDSOLocal(RM, TargetTriple, *GV->getParent(), GV);
   if (UsePCRel) {
     SDValue GA = DAG.getTargetGlobalAddress(GV, dl, PtrVT, Offset,
                                             HexagonII::MO_PCREL);
diff --git a/test/CodeGen/Hexagon/pic-local.ll b/test/CodeGen/Hexagon/pic-local.ll
new file mode 100644 (file)
index 0000000..48b0096
--- /dev/null
@@ -0,0 +1,19 @@
+; RUN: llc -march=hexagon -mcpu=hexagonv5 -relocation-model=pic < %s | FileCheck %s
+
+define private void @f1() {
+  ret void
+}
+
+define internal void @f2() {
+  ret void
+}
+
+define void()* @get_f1() {
+  ; CHECK:  r0 = add(pc, ##.Lf1@PCREL)
+  ret void()* @f1
+}
+
+define void()* @get_f2() {
+  ; CHECK: r0 = add(pc, ##f2@PCREL)
+  ret void()* @f2
+}