NOTE: the internal pullups are not totally reliable, please do add external pullups on your bus.
#include "esp_err.h"
#include "rom/queue.h"
-#include "soc/host_reg.h"
+#include "soc/sdio_slave_periph.h"
#ifdef __cplusplus
extern "C" {
///< All data that do not fully fill a buffer is still counted as one buffer. E.g. 10 bytes data costs 2 buffers if the size is 8 bytes per buffer.
///< Buffer size of the slave pre-defined between host and slave before communication. All receive buffer given to the driver should be larger than this.
sdio_event_cb_t event_cb; ///< when the host interrupts slave, this callback will be called with interrupt number (0-7).
+ uint32_t flags; ///< Features to be enabled for the slave, combinations of ``SDIO_SLAVE_FLAG_*``.
+#define SDIO_SLAVE_FLAG_DAT2_DISABLED BIT(0) /**< It is required by the SD specification that all 4 data
+ lines should be used and pulled up even in 1-bit mode or SPI mode. However, as a feature, the user can speicfy
+ this flag to make use of DAT2 pin in 1-bit mode. Note that the host cannot read CCCR registers to know we don't
+ support 4-bit mode anymore, please do this at your own risk.
+ */
+#define SDIO_SLAVE_FLAG_HOST_INTR_DISABLED BIT(1) /**< The DAT1 line is used as the interrupt line in SDIO
+ protocol. However, as a feature, the user can speicfy this flag to make use of DAT1 pin of the slave in 1-bit
+ mode. Note that the host has to do polling to the interrupt registers to know whether there are interrupts from
+ the slave. And it cannot read CCCR registers to know we don't support 4-bit mode anymore, please do this at
+ your own risk.
+ */
+#define SDIO_SLAVE_FLAG_INTERNAL_PULLUP BIT(2) /**< Enable internal pullups for enabled pins. It is required
+ by the SD specification that all the 4 data lines should be pulled up even in 1-bit mode or SPI mode. Note that
+ the internal pull-ups are not sufficient for stable communication, please do connect external pull-ups on the
+ bus. This is only for example and debug use.
+ */
} sdio_slave_config_t;
/** Handle of a receive buffer, register a handle by calling ``sdio_slave_recv_register_buf``. Use the handle to load the buffer to the
gpio_num_t gpio_cd; ///< GPIO number of card detect signal
gpio_num_t gpio_wp; ///< GPIO number of write protect signal
uint8_t width; ///< Bus width used by the slot (might be less than the max width supported)
+ uint32_t flags; ///< Features used by this slot
+#define SDMMC_SLOT_FLAG_INTERNAL_PULLUP BIT(0)
+ /**< Enable internal pullups on enabled pins. The internal pullups
+ are insufficient however, please make sure external pullups are
+ connected on the bus. This is for debug / example purpose only.
+ */
} sdmmc_slot_config_t;
#define SDMMC_SLOT_NO_CD ((gpio_num_t) -1) ///< indicates that card detect line is not used
.gpio_cd = SDMMC_SLOT_NO_CD, \
.gpio_wp = SDMMC_SLOT_NO_WP, \
.width = SDMMC_SLOT_WIDTH_DEFAULT, \
+ .flags = 0, \
}
/**
*/
esp_err_t sdmmc_host_deinit();
+/**
+ * @brief Enable the pull-ups of sd pins.
+ *
+ * @note You should always place actual pullups on the lines instead of using
+ * this function. Internal pullup resistance are high and not sufficient, may
+ * cause instability in products. This is for debug or examples only.
+ *
+ * @param slot Slot to use, normally set it to 1.
+ * @param width Bit width of your configuration, 1 or 4.
+ *
+ * @return
+ * - ESP_OK: if success
+ * - ESP_ERR_INVALID_ARG: if configured width larger than maximum the slot can
+ * support
+ */
+esp_err_t sdmmc_host_pullup_en(int slot, int width);
+
#ifdef __cplusplus
}
#endif
#include <string.h>
#include "driver/sdio_slave.h"
-#include "soc/slc_struct.h"
-#include "soc/slc_reg.h"
-#include "soc/host_struct.h"
-#include "soc/hinf_struct.h"
+#include "soc/sdio_slave_periph.h"
#include "rom/lldesc.h"
#include "esp_log.h"
#include "esp_intr_alloc.h"
STATE_SENDING = 3,
} send_state_t;
-typedef struct {
- uint32_t clk;
- uint32_t cmd;
- uint32_t d0;
- uint32_t d1;
- uint32_t d2;
- uint32_t d3;
- int func;
-} sdio_slave_slot_info_t ;
-
-// I/O slot of sdio slave:
-// 0: GPIO 6, 11, 7, 8, 9, 10,
-// 1: GPIO 14, 15, 2, 4, 12, 13 for CLK, CMD, D0, D1, D2, D3 respectively.
-// only one peripheral for SDIO and only one slot can work at the same time.
-// currently slot 0 is occupied by SPI for flash
-static const sdio_slave_slot_info_t s_slot_info[2] = {
- {
- .clk = PERIPHS_IO_MUX_SD_CLK_U,
- .cmd = PERIPHS_IO_MUX_SD_CMD_U,
- .d0 = PERIPHS_IO_MUX_SD_DATA0_U,
- .d1 = PERIPHS_IO_MUX_SD_DATA1_U,
- .d2 = PERIPHS_IO_MUX_SD_DATA2_U,
- .d3 = PERIPHS_IO_MUX_SD_DATA3_U,
- .func = 0,
- }, {
- .clk = PERIPHS_IO_MUX_MTMS_U,
- .cmd = PERIPHS_IO_MUX_MTDO_U,
- .d0 = PERIPHS_IO_MUX_GPIO2_U,
- .d1 = PERIPHS_IO_MUX_GPIO4_U,
- .d2 = PERIPHS_IO_MUX_MTDI_U,
- .d3 = PERIPHS_IO_MUX_MTCK_U,
- .func = 4,
- },
-};
-
// first 3 WORDs of this struct is defined by and compatible to the DMA link list format.
// sdio_slave_buf_handle_t is of type buf_desc_t*;
typedef struct buf_desc_s{
return ESP_ERR_NO_MEM;
}
-static inline void configure_pin(uint32_t io_mux_reg, uint32_t func)
+static void configure_pin(int pin, uint32_t func, bool pullup)
{
const int sdmmc_func = func;
const int drive_strength = 3;
- PIN_INPUT_ENABLE(io_mux_reg);
- PIN_FUNC_SELECT(io_mux_reg, sdmmc_func);
- PIN_SET_DRV(io_mux_reg, drive_strength);
+ assert(pin!=-1);
+ uint32_t reg = GPIO_PIN_MUX_REG[pin];
+ assert(reg!=UINT32_MAX);
+
+ PIN_INPUT_ENABLE(reg);
+ PIN_FUNC_SELECT(reg, sdmmc_func);
+ PIN_SET_DRV(reg, drive_strength);
+ if (pullup) {
+ gpio_pullup_en(pin);
+ gpio_pulldown_dis(pin);
+ }
}
static inline esp_err_t sdio_slave_hw_init(sdio_slave_config_t *config)
SLC.slc0_int_ena.val = 0;
//initialize pin
- const sdio_slave_slot_info_t *slot = &s_slot_info[1];
- configure_pin(slot->clk, slot->func);
- configure_pin(slot->cmd, slot->func);
- configure_pin(slot->d0, slot->func);
- configure_pin(slot->d1, slot->func);
- configure_pin(slot->d2, slot->func);
- configure_pin(slot->d3, slot->func);
+ const sdio_slave_slot_info_t *slot = &sdio_slave_slot_info[1];
+
+ bool pullup = config->flags & SDIO_SLAVE_FLAG_INTERNAL_PULLUP;
+ configure_pin(slot->clk_gpio, slot->func, false); //clk doesn't need a pullup
+ configure_pin(slot->cmd_gpio, slot->func, pullup);
+ configure_pin(slot->d0_gpio, slot->func, pullup);
+ if ((config->flags & SDIO_SLAVE_FLAG_HOST_INTR_DISABLED)==0) {
+ configure_pin(slot->d1_gpio, slot->func, pullup);
+ }
+ if ((config->flags & SDIO_SLAVE_FLAG_DAT2_DISABLED)==0) {
+ configure_pin(slot->d2_gpio, slot->func, pullup);
+ }
+ configure_pin(slot->d3_gpio, slot->func, pullup);
+
//enable module and config
periph_module_reset(PERIPH_SDIO_SLAVE_MODULE);
periph_module_enable(PERIPH_SDIO_SLAVE_MODULE);
#include <sys/param.h>
#include "esp_log.h"
#include "esp_intr_alloc.h"
-#include "soc/sdmmc_struct.h"
-#include "soc/sdmmc_reg.h"
#include "soc/io_mux_reg.h"
-#include "soc/gpio_sig_map.h"
#include "rom/gpio.h"
#include "driver/gpio.h"
#include "driver/sdmmc_host.h"
#include "driver/periph_ctrl.h"
#include "sdmmc_private.h"
#include "freertos/semphr.h"
+#include "soc/sdmmc_periph.h"
#define SDMMC_EVENT_QUEUE_LENGTH 32
-typedef struct {
- uint32_t clk;
- uint32_t cmd;
- uint32_t d0;
- uint32_t d1;
- uint32_t d2;
- uint32_t d3;
- uint32_t d4;
- uint32_t d5;
- uint32_t d6;
- uint32_t d7;
- uint8_t d1_gpio;
- uint8_t d3_gpio;
- uint8_t card_detect;
- uint8_t write_protect;
- uint8_t card_int;
- uint8_t width;
-} sdmmc_slot_info_t;
-
static void sdmmc_isr(void* arg);
static void sdmmc_host_dma_init();
-static const sdmmc_slot_info_t s_slot_info[2] = {
- {
- .clk = PERIPHS_IO_MUX_SD_CLK_U,
- .cmd = PERIPHS_IO_MUX_SD_CMD_U,
- .d0 = PERIPHS_IO_MUX_SD_DATA0_U,
- .d1 = PERIPHS_IO_MUX_SD_DATA1_U,
- .d2 = PERIPHS_IO_MUX_SD_DATA2_U,
- .d3 = PERIPHS_IO_MUX_SD_DATA3_U,
- .d1_gpio = 8,
- .d3_gpio = 10,
- .d4 = PERIPHS_IO_MUX_GPIO16_U,
- .d5 = PERIPHS_IO_MUX_GPIO17_U,
- .d6 = PERIPHS_IO_MUX_GPIO5_U,
- .d7 = PERIPHS_IO_MUX_GPIO18_U,
- .card_detect = HOST_CARD_DETECT_N_1_IDX,
- .write_protect = HOST_CARD_WRITE_PRT_1_IDX,
- .card_int = HOST_CARD_INT_N_1_IDX,
- .width = 8
- },
- {
- .clk = PERIPHS_IO_MUX_MTMS_U,
- .cmd = PERIPHS_IO_MUX_MTDO_U,
- .d0 = PERIPHS_IO_MUX_GPIO2_U,
- .d1 = PERIPHS_IO_MUX_GPIO4_U,
- .d2 = PERIPHS_IO_MUX_MTDI_U,
- .d3 = PERIPHS_IO_MUX_MTCK_U,
- .d1_gpio = 4,
- .d3_gpio = 13,
- .card_detect = HOST_CARD_DETECT_N_2_IDX,
- .write_protect = HOST_CARD_WRITE_PRT_2_IDX,
- .card_int = HOST_CARD_INT_N_2_IDX,
- .width = 4
- }
-};
static const char* TAG = "sdmmc_periph";
static intr_handle_t s_intr_handle;
return ESP_OK;
}
-
-static inline void configure_pin(uint32_t io_mux_reg)
+static void configure_pin(int pin)
{
const int sdmmc_func = 3;
const int drive_strength = 3;
- PIN_INPUT_ENABLE(io_mux_reg);
- PIN_FUNC_SELECT(io_mux_reg, sdmmc_func);
- PIN_SET_DRV(io_mux_reg, drive_strength);
+ assert(pin!=-1);
+ uint32_t reg = GPIO_PIN_MUX_REG[pin];
+ assert(reg != UINT32_MAX);
+ PIN_INPUT_ENABLE(reg);
+ PIN_FUNC_SELECT(reg, sdmmc_func);
+ PIN_SET_DRV(reg, drive_strength);
}
esp_err_t sdmmc_host_init_slot(int slot, const sdmmc_slot_config_t* slot_config)
{
+ bool pullup = slot_config->flags & SDMMC_SLOT_FLAG_INTERNAL_PULLUP;
+ if (pullup) {
+ sdmmc_host_pullup_en(slot, slot_config->width);
+ }
if (!s_intr_handle) {
return ESP_ERR_INVALID_STATE;
}
uint8_t slot_width = slot_config->width;
// Configure pins
- const sdmmc_slot_info_t* pslot = &s_slot_info[slot];
+ const sdmmc_slot_info_t* pslot = &sdmmc_slot_info[slot];
if (slot_width == SDMMC_SLOT_WIDTH_DEFAULT) {
slot_width = pslot->width;
}
s_slot_width[slot] = slot_width;
- configure_pin(pslot->clk);
- configure_pin(pslot->cmd);
- configure_pin(pslot->d0);
+ configure_pin(pslot->clk_gpio);
+ configure_pin(pslot->cmd_gpio);
+ configure_pin(pslot->d0_gpio);
if (slot_width >= 4) {
- configure_pin(pslot->d1);
- configure_pin(pslot->d2);
+ configure_pin(pslot->d1_gpio);
+ configure_pin(pslot->d2_gpio);
//force pull-up D3 to make slave detect SD mode. connect to peripheral after width configuration.
gpio_config_t gpio_conf = {
.pin_bit_mask = BIT(pslot->d3_gpio),
gpio_config( &gpio_conf );
gpio_set_level( pslot->d3_gpio, 1 );
if (slot_width == 8) {
- configure_pin(pslot->d4);
- configure_pin(pslot->d5);
- configure_pin(pslot->d6);
- configure_pin(pslot->d7);
+ configure_pin(pslot->d4_gpio);
+ configure_pin(pslot->d5_gpio);
+ configure_pin(pslot->d6_gpio);
+ configure_pin(pslot->d7_gpio);
}
}
if (!(slot == 0 || slot == 1)) {
return ESP_ERR_INVALID_ARG;
}
- if (s_slot_info[slot].width < width) {
+ if (sdmmc_slot_info[slot].width < width) {
return ESP_ERR_INVALID_ARG;
}
const uint16_t mask = BIT(slot);
} else if (width == 4) {
SDMMC.ctype.card_width_8 &= ~mask;
SDMMC.ctype.card_width |= mask;
- configure_pin(s_slot_info[slot].d3); // D3 was set to GPIO high to force slave into SD 1-bit mode, until 4-bit mode is set
+ configure_pin(sdmmc_slot_info[slot].d3_gpio); // D3 was set to GPIO high to force slave into SD 1-bit mode, until 4-bit mode is set
} else if (width == 8){
SDMMC.ctype.card_width_8 |= mask;
- configure_pin(s_slot_info[slot].d3); // D3 was set to GPIO high to force slave into SD 1-bit mode, until 4-bit mode is set
+ configure_pin(sdmmc_slot_info[slot].d3_gpio); // D3 was set to GPIO high to force slave into SD 1-bit mode, until 4-bit mode is set
} else {
return ESP_ERR_INVALID_ARG;
}
esp_err_t sdmmc_host_io_int_enable(int slot)
{
- configure_pin(s_slot_info[slot].d1);
+ configure_pin(sdmmc_slot_info[slot].d1_gpio);
return ESP_OK;
}
SDMMC.intmask.sdio &= ~BIT(slot); /* Disable SDIO interrupt */
SDMMC.rintsts.sdio = BIT(slot);
- if (gpio_get_level(s_slot_info[slot].d1_gpio) == 0) {
+ if (gpio_get_level(sdmmc_slot_info[slot].d1_gpio) == 0) {
return ESP_OK;
}
/* Otherwise, need to wait for an interrupt. Since D1 was high,
}
}
+esp_err_t sdmmc_host_pullup_en(int slot, int width)
+{
+ if (width > sdmmc_slot_info[slot].width) {
+ //in esp32 we only support 8 bit in slot 0, note this is occupied by the flash by default
+ return ESP_ERR_INVALID_ARG;
+ }
+ //according to the spec, the host control the clk, we don't to pull it up here
+ gpio_pullup_en(sdmmc_slot_info[slot].cmd_gpio);
+ gpio_pulldown_dis(sdmmc_slot_info[slot].cmd_gpio);
+ gpio_pullup_en(sdmmc_slot_info[slot].d0_gpio);
+ gpio_pulldown_dis(sdmmc_slot_info[slot].d0_gpio);
+ if (width >= 4) {
+ gpio_pullup_en(sdmmc_slot_info[slot].d1_gpio);
+ gpio_pulldown_dis(sdmmc_slot_info[slot].d1_gpio);
+ gpio_pullup_en(sdmmc_slot_info[slot].d2_gpio);
+ gpio_pulldown_dis(sdmmc_slot_info[slot].d2_gpio);
+ gpio_pullup_en(sdmmc_slot_info[slot].d3_gpio);
+ gpio_pulldown_dis(sdmmc_slot_info[slot].d3_gpio);
+ }
+ if (width == 8) {
+ gpio_pullup_en(sdmmc_slot_info[slot].d4_gpio);
+ gpio_pulldown_dis(sdmmc_slot_info[slot].d4_gpio);
+ gpio_pullup_en(sdmmc_slot_info[slot].d5_gpio);
+ gpio_pulldown_dis(sdmmc_slot_info[slot].d5_gpio);
+ gpio_pullup_en(sdmmc_slot_info[slot].d6_gpio);
+ gpio_pulldown_dis(sdmmc_slot_info[slot].d6_gpio);
+ gpio_pullup_en(sdmmc_slot_info[slot].d7_gpio);
+ gpio_pulldown_dis(sdmmc_slot_info[slot].d7_gpio);
+ }
+ return ESP_OK;
+}
\ No newline at end of file
#include "esp_err.h"
#include "freertos/FreeRTOS.h"
#include "freertos/queue.h"
-#include "soc/sdmmc_struct.h"
+#include "soc/sdmmc_periph.h"
typedef struct {
uint32_t sdmmc_status; ///< masked SDMMC interrupt status
#include "freertos/FreeRTOS.h"
#include "freertos/queue.h"
#include "freertos/semphr.h"
-#include "soc/sdmmc_reg.h"
-#include "soc/sdmmc_struct.h"
+#include "soc/sdmmc_periph.h"
#include "soc/soc_memory_layout.h"
#include "driver/sdmmc_types.h"
#include "driver/sdmmc_defs.h"
#include "esp_log.h"
#include "sys/lock.h"
#include "soc/sdmmc_reg.h"
-#include "soc/sdmmc_struct.h"
+#include "soc/sdmmc_periph.h"
#include "driver/sdmmc_types.h"
#include "driver/sdmmc_defs.h"
#include "driver/sdmmc_host.h"
--- /dev/null
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD\r
+//\r
+// Licensed under the Apache License, Version 2.0 (the "License");\r
+// you may not use this file except in compliance with the License.\r
+// You may obtain a copy of the License at\r
+\r
+// http://www.apache.org/licenses/LICENSE-2.0\r
+//\r
+// Unless required by applicable law or agreed to in writing, software\r
+// distributed under the License is distributed on an "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
+// See the License for the specific language governing permissions and\r
+// limitations under the License.\r
+\r
+#ifndef _SOC_SDIO_SLAVE_PINS_H_\r
+#define _SOC_SDIO_SLAVE_PINS_H_\r
+\r
+#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_CLK 6\r
+#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_CMD 11\r
+#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D0 7\r
+#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D1 8\r
+#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D2 9\r
+#define SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D3 10\r
+#define SDIO_SLAVE_SLOT0_FUNC 0\r
+\r
+#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_CLK 14\r
+#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_CMD 15\r
+#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D0 2\r
+#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D1 4\r
+#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D2 12\r
+#define SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D3 13\r
+#define SDIO_SLAVE_SLOT1_FUNC 4\r
+\r
+#endif /* _SOC_SDIO_SLAVE_PINS_H_ */
\ No newline at end of file
--- /dev/null
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD\r
+//\r
+// Licensed under the Apache License, Version 2.0 (the "License");\r
+// you may not use this file except in compliance with the License.\r
+// You may obtain a copy of the License at\r
+\r
+// http://www.apache.org/licenses/LICENSE-2.0\r
+//\r
+// Unless required by applicable law or agreed to in writing, software\r
+// distributed under the License is distributed on an "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
+// See the License for the specific language governing permissions and\r
+// limitations under the License.\r
+\r
+#ifndef _SOC_SDMMC_PINS_H_\r
+#define _SOC_SDMMC_PINS_H_\r
+\r
+#define SDMMC_SLOT0_IOMUX_PIN_NUM_CLK 6\r
+#define SDMMC_SLOT0_IOMUX_PIN_NUM_CMD 11\r
+#define SDMMC_SLOT0_IOMUX_PIN_NUM_D0 7\r
+#define SDMMC_SLOT0_IOMUX_PIN_NUM_D1 8\r
+#define SDMMC_SLOT0_IOMUX_PIN_NUM_D2 9\r
+#define SDMMC_SLOT0_IOMUX_PIN_NUM_D3 10\r
+#define SDMMC_SLOT0_IOMUX_PIN_NUM_D4 16\r
+#define SDMMC_SLOT0_IOMUX_PIN_NUM_D5 17\r
+#define SDMMC_SLOT0_IOMUX_PIN_NUM_D6 5\r
+#define SDMMC_SLOT0_IOMUX_PIN_NUM_D7 18\r
+#define SDMMC_SLOT0_FUNC 0\r
+\r
+#define SDMMC_SLOT1_IOMUX_PIN_NUM_CLK 14\r
+#define SDMMC_SLOT1_IOMUX_PIN_NUM_CMD 15\r
+#define SDMMC_SLOT1_IOMUX_PIN_NUM_D0 2\r
+#define SDMMC_SLOT1_IOMUX_PIN_NUM_D1 4\r
+#define SDMMC_SLOT1_IOMUX_PIN_NUM_D2 12\r
+#define SDMMC_SLOT1_IOMUX_PIN_NUM_D3 13\r
+#define SDMMC_SLOT1_FUNC 4\r
+\r
+#endif /* _SOC_SDMMC_PINS_H_ */
\ No newline at end of file
--- /dev/null
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD\r
+//\r
+// Licensed under the Apache License, Version 2.0 (the "License");\r
+// you may not use this file except in compliance with the License.\r
+// You may obtain a copy of the License at\r
+\r
+// http://www.apache.org/licenses/LICENSE-2.0\r
+//\r
+// Unless required by applicable law or agreed to in writing, software\r
+// distributed under the License is distributed on an "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
+// See the License for the specific language governing permissions and\r
+// limitations under the License.\r
+\r
+#include <stdint.h>\r
+#include "soc/sdio_slave_periph.h"\r
+#include "soc/io_mux_reg.h"\r
+#include "soc/sdio_slave_pins.h"\r
+\r
+// I/O slot of sdio slave:\r
+// 0: GPIO 6, 11, 7, 8, 9, 10,\r
+// 1: GPIO 14, 15, 2, 4, 12, 13 for CLK, CMD, D0, D1, D2, D3 respectively.\r
+// only one peripheral for SDIO and only one slot can work at the same time.\r
+// currently slot 0 is occupied by SPI for flash\r
+const sdio_slave_slot_info_t sdio_slave_slot_info[2] = {\r
+ {\r
+ .clk_gpio = SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_CLK,\r
+ .cmd_gpio = SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_CMD,\r
+ .d0_gpio = SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D0,\r
+ .d1_gpio = SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D1,\r
+ .d2_gpio = SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D2,\r
+ .d3_gpio = SDIO_SLAVE_SLOT0_IOMUX_PIN_NUM_D3,\r
+ .func = SDIO_SLAVE_SLOT0_FUNC,\r
+ }, {\r
+ .clk_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_CLK,\r
+ .cmd_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_CMD,\r
+ .d0_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D0,\r
+ .d1_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D1,\r
+ .d2_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D2,\r
+ .d3_gpio = SDIO_SLAVE_SLOT1_IOMUX_PIN_NUM_D3,\r
+ .func = SDIO_SLAVE_SLOT1_FUNC,\r
+ },\r
+};\r
--- /dev/null
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD\r
+//\r
+// Licensed under the Apache License, Version 2.0 (the "License");\r
+// you may not use this file except in compliance with the License.\r
+// You may obtain a copy of the License at\r
+\r
+// http://www.apache.org/licenses/LICENSE-2.0\r
+//\r
+// Unless required by applicable law or agreed to in writing, software\r
+// distributed under the License is distributed on an "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
+// See the License for the specific language governing permissions and\r
+// limitations under the License.\r
+\r
+#include "soc/sdmmc_periph.h"\r
+\r
+const sdmmc_slot_info_t sdmmc_slot_info[2] = {\r
+ {\r
+ .clk_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_CLK,\r
+ .cmd_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_CMD,\r
+ .d0_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_D0,\r
+ .d1_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_D1,\r
+ .d2_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_D2,\r
+ .d3_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_D3,\r
+ .d4_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_D4,\r
+ .d5_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_D5,\r
+ .d6_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_D6,\r
+ .d7_gpio = SDMMC_SLOT0_IOMUX_PIN_NUM_D7,\r
+ .card_detect = HOST_CARD_DETECT_N_1_IDX,\r
+ .write_protect = HOST_CARD_WRITE_PRT_1_IDX,\r
+ .card_int = HOST_CARD_INT_N_1_IDX,\r
+ .width = 8\r
+ },\r
+ {\r
+ .clk_gpio = SDMMC_SLOT1_IOMUX_PIN_NUM_CLK,\r
+ .cmd_gpio = SDMMC_SLOT1_IOMUX_PIN_NUM_CMD,\r
+ .d0_gpio = SDMMC_SLOT1_IOMUX_PIN_NUM_D0,\r
+ .d1_gpio = SDMMC_SLOT1_IOMUX_PIN_NUM_D1,\r
+ .d2_gpio = SDMMC_SLOT1_IOMUX_PIN_NUM_D2,\r
+ .d3_gpio = SDMMC_SLOT1_IOMUX_PIN_NUM_D3,\r
+ .d4_gpio = -1, //slot1 has no D4-7\r
+ .d5_gpio = -1,\r
+ .d6_gpio = -1,\r
+ .d7_gpio = -1,\r
+ .card_detect = HOST_CARD_DETECT_N_2_IDX,\r
+ .write_protect = HOST_CARD_WRITE_PRT_2_IDX,\r
+ .card_int = HOST_CARD_INT_N_2_IDX,\r
+ .width = 4\r
+ }\r
+};
\ No newline at end of file
--- /dev/null
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD\r
+//\r
+// Licensed under the Apache License, Version 2.0 (the "License");\r
+// you may not use this file except in compliance with the License.\r
+// You may obtain a copy of the License at\r
+\r
+// http://www.apache.org/licenses/LICENSE-2.0\r
+//\r
+// Unless required by applicable law or agreed to in writing, software\r
+// distributed under the License is distributed on an "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
+// See the License for the specific language governing permissions and\r
+// limitations under the License.\r
+\r
+#ifndef _SOC_SDIO_SLAVE_PERIPH_H_\r
+#define _SOC_SDIO_SLAVE_PERIPH_H_\r
+\r
+#include <stdint.h>\r
+//include soc related (generated) definitions\r
+#include "soc/sdio_slave_pins.h"\r
+#include "soc/slc_reg.h"\r
+#include "soc/slc_struct.h"\r
+#include "soc/host_reg.h"\r
+#include "soc/host_struct.h"\r
+#include "soc/hinf_reg.h"\r
+#include "soc/hinf_struct.h"\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+/** pin and signal information of each slot */\r
+typedef struct {\r
+ uint32_t clk_gpio;\r
+ uint32_t cmd_gpio;\r
+ uint32_t d0_gpio;\r
+ uint32_t d1_gpio;\r
+ uint32_t d2_gpio;\r
+ uint32_t d3_gpio;\r
+ int func;\r
+} sdio_slave_slot_info_t;\r
+\r
+extern const sdio_slave_slot_info_t sdio_slave_slot_info[];\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* _SOC_SDIO_SLAVE_PERIPH_H_ */
\ No newline at end of file
--- /dev/null
+// Copyright 2015-2018 Espressif Systems (Shanghai) PTE LTD\r
+//\r
+// Licensed under the Apache License, Version 2.0 (the "License");\r
+// you may not use this file except in compliance with the License.\r
+// You may obtain a copy of the License at\r
+\r
+// http://www.apache.org/licenses/LICENSE-2.0\r
+//\r
+// Unless required by applicable law or agreed to in writing, software\r
+// distributed under the License is distributed on an "AS IS" BASIS,\r
+// WITHOUT WARRANTIES OR CONDITIONS OF ANY KIND, either express or implied.\r
+// See the License for the specific language governing permissions and\r
+// limitations under the License.\r
+\r
+#ifndef _SOC_SDMMC_PERIPH_H_\r
+#define _SOC_SDMMC_PERIPH_H_\r
+\r
+#include <stdint.h>\r
+//include soc related (generated) definitions\r
+#include "soc/sdmmc_pins.h"\r
+#include "soc/sdmmc_reg.h"\r
+#include "soc/sdmmc_struct.h"\r
+#include "soc/gpio_sig_map.h"\r
+\r
+#ifdef __cplusplus\r
+extern "C" {\r
+#endif\r
+\r
+typedef struct {\r
+ uint8_t clk_gpio;\r
+ uint8_t cmd_gpio;\r
+ uint8_t d0_gpio;\r
+ uint8_t d1_gpio;\r
+ uint8_t d2_gpio;\r
+ uint8_t d3_gpio;\r
+ uint8_t d4_gpio;\r
+ uint8_t d5_gpio;\r
+ uint8_t d6_gpio;\r
+ uint8_t d7_gpio;\r
+ uint8_t card_detect;\r
+ uint8_t write_protect;\r
+ uint8_t card_int;\r
+ uint8_t width;\r
+} sdmmc_slot_info_t;\r
+\r
+/** pin and signal information of each slot */\r
+extern const sdmmc_slot_info_t sdmmc_slot_info[];\r
+\r
+#ifdef __cplusplus\r
+}\r
+#endif\r
+\r
+#endif /* _SOC_SDMMC_PERIPH_H_ */
\ No newline at end of file
projects / esp-idf / commitdiff