]> granicus.if.org Git - llvm/commitdiff
[X86] Fix creating vreg def after use.
authorAyman Musa <ayman.musa@intel.com>
Wed, 1 Mar 2017 10:20:48 +0000 (10:20 +0000)
committerAyman Musa <ayman.musa@intel.com>
Wed, 1 Mar 2017 10:20:48 +0000 (10:20 +0000)
git-svn-id: https://llvm.org/svn/llvm-project/llvm/trunk@296601 91177308-0d34-0410-b5e6-96231b3b80d8

lib/Target/X86/X86FastISel.cpp

index 278d963074567078fe5bbdf9ec9815acb0faa0b1..4a46cb0874e10b022c3b28d7a0e070e206847e82 100644 (file)
@@ -2423,17 +2423,22 @@ bool X86FastISel::X86SelectFPExtOrFPTrunc(const Instruction *I,
   if (OpReg == 0)
     return false;
 
+  unsigned ImplicitDefReg;
+  if (Subtarget->hasAVX()) {
+    ImplicitDefReg = createResultReg(RC);
+    BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
+            TII.get(TargetOpcode::IMPLICIT_DEF), ImplicitDefReg);
+
+  }
+
   unsigned ResultReg = createResultReg(RC);
   MachineInstrBuilder MIB;
   MIB = BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc, TII.get(TargetOpc),
                 ResultReg);
-  if (Subtarget->hasAVX()) {
-    unsigned ImplicitDefReg = createResultReg(RC);
-    BuildMI(*FuncInfo.MBB, FuncInfo.InsertPt, DbgLoc,
-            TII.get(TargetOpcode::IMPLICIT_DEF), ImplicitDefReg);
 
+  if (Subtarget->hasAVX())
     MIB.addReg(ImplicitDefReg);
-  }
+
   MIB.addReg(OpReg);
   updateValueMap(I, ResultReg);
   return true;