#include "llvm/MC/MCSymbol.h"
#include "llvm/MC/MCWinEH.h"
#include "llvm/Support/SMLoc.h"
+#include "llvm/Support/TargetParser.h"
#include <cassert>
#include <cstdint>
#include <memory>
virtual void emitIntTextAttribute(unsigned Attribute, unsigned IntValue,
StringRef StringValue = "");
virtual void emitFPU(unsigned FPU);
- virtual void emitArch(unsigned Arch);
+ virtual void emitArch(ARM::ArchKind Arch);
virtual void emitArchExtension(unsigned ArchExt);
- virtual void emitObjectArch(unsigned Arch);
+ virtual void emitObjectArch(ARM::ArchKind Arch);
void emitTargetAttributes(const MCSubtargetInfo &STI);
virtual void finishAttributeSection();
virtual void emitInst(uint32_t Inst, char Suffix = '\0');
#ifndef AARCH64_ARCH
#define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT)
#endif
-AARCH64_ARCH("invalid", AK_INVALID, nullptr, nullptr,
+AARCH64_ARCH("invalid", INVALID, "", "",
ARMBuildAttrs::CPUArch::v8_A, FK_NONE, AArch64::AEK_NONE)
-AARCH64_ARCH("armv8-a", AK_ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8_A,
+AARCH64_ARCH("armv8-a", ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8_A,
FK_CRYPTO_NEON_FP_ARMV8,
(AArch64::AEK_CRYPTO | AArch64::AEK_FP | AArch64::AEK_SIMD))
-AARCH64_ARCH("armv8.1-a", AK_ARMV8_1A, "8.1-A", "v8.1a",
+AARCH64_ARCH("armv8.1-a", ARMV8_1A, "8.1-A", "v8.1a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_LSE))
-AARCH64_ARCH("armv8.2-a", AK_ARMV8_2A, "8.2-A", "v8.2a",
+AARCH64_ARCH("armv8.2-a", ARMV8_2A, "8.2-A", "v8.2a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(AArch64::AEK_CRC | AArch64::AEK_CRYPTO | AArch64::AEK_FP |
AArch64::AEK_SIMD | AArch64::AEK_RAS | AArch64::AEK_LSE))
#ifndef AARCH64_CPU_NAME
#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)
#endif
-AARCH64_CPU_NAME("cortex-a35", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
+AARCH64_CPU_NAME("cortex-a35", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
-AARCH64_CPU_NAME("cortex-a53", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, true,
+AARCH64_CPU_NAME("cortex-a53", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, true,
(AArch64::AEK_CRC))
-AARCH64_CPU_NAME("cortex-a57", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
+AARCH64_CPU_NAME("cortex-a57", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
-AARCH64_CPU_NAME("cortex-a72", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
+AARCH64_CPU_NAME("cortex-a72", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
-AARCH64_CPU_NAME("cortex-a73", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
+AARCH64_CPU_NAME("cortex-a73", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
-AARCH64_CPU_NAME("cyclone", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
+AARCH64_CPU_NAME("cyclone", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_NONE))
-AARCH64_CPU_NAME("exynos-m1", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
+AARCH64_CPU_NAME("exynos-m1", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
-AARCH64_CPU_NAME("exynos-m2", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
+AARCH64_CPU_NAME("exynos-m2", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
-AARCH64_CPU_NAME("exynos-m3", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
+AARCH64_CPU_NAME("exynos-m3", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
-AARCH64_CPU_NAME("falkor", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
+AARCH64_CPU_NAME("falkor", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
-AARCH64_CPU_NAME("kryo", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
+AARCH64_CPU_NAME("kryo", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC))
-AARCH64_CPU_NAME("thunderx2t99", AK_ARMV8_1A, FK_CRYPTO_NEON_FP_ARMV8, false,
+AARCH64_CPU_NAME("thunderx2t99", ARMV8_1A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_NONE))
-AARCH64_CPU_NAME("thunderx", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
+AARCH64_CPU_NAME("thunderx", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC | AArch64::AEK_PROFILE))
-AARCH64_CPU_NAME("thunderxt88", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
+AARCH64_CPU_NAME("thunderxt88", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC | AArch64::AEK_PROFILE))
-AARCH64_CPU_NAME("thunderxt81", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
+AARCH64_CPU_NAME("thunderxt81", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC | AArch64::AEK_PROFILE))
-AARCH64_CPU_NAME("thunderxt83", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
+AARCH64_CPU_NAME("thunderxt83", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false,
(AArch64::AEK_CRC | AArch64::AEK_PROFILE))
// Invalid CPU
-AARCH64_CPU_NAME("invalid", AK_INVALID, FK_INVALID, true, AArch64::AEK_INVALID)
+AARCH64_CPU_NAME("invalid", INVALID, FK_INVALID, true, AArch64::AEK_INVALID)
#undef AARCH64_CPU_NAME
#ifndef ARM_FPU
#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION)
#endif
-ARM_FPU("invalid", FK_INVALID, FV_NONE, NS_None, FR_None)
-ARM_FPU("none", FK_NONE, FV_NONE, NS_None, FR_None)
-ARM_FPU("vfp", FK_VFP, FV_VFPV2, NS_None, FR_None)
-ARM_FPU("vfpv2", FK_VFPV2, FV_VFPV2, NS_None, FR_None)
-ARM_FPU("vfpv3", FK_VFPV3, FV_VFPV3, NS_None, FR_None)
-ARM_FPU("vfpv3-fp16", FK_VFPV3_FP16, FV_VFPV3_FP16, NS_None, FR_None)
-ARM_FPU("vfpv3-d16", FK_VFPV3_D16, FV_VFPV3, NS_None, FR_D16)
-ARM_FPU("vfpv3-d16-fp16", FK_VFPV3_D16_FP16, FV_VFPV3_FP16, NS_None, FR_D16)
-ARM_FPU("vfpv3xd", FK_VFPV3XD, FV_VFPV3, NS_None, FR_SP_D16)
-ARM_FPU("vfpv3xd-fp16", FK_VFPV3XD_FP16, FV_VFPV3_FP16, NS_None, FR_SP_D16)
-ARM_FPU("vfpv4", FK_VFPV4, FV_VFPV4, NS_None, FR_None)
-ARM_FPU("vfpv4-d16", FK_VFPV4_D16, FV_VFPV4, NS_None, FR_D16)
-ARM_FPU("fpv4-sp-d16", FK_FPV4_SP_D16, FV_VFPV4, NS_None, FR_SP_D16)
-ARM_FPU("fpv5-d16", FK_FPV5_D16, FV_VFPV5, NS_None, FR_D16)
-ARM_FPU("fpv5-sp-d16", FK_FPV5_SP_D16, FV_VFPV5, NS_None, FR_SP_D16)
-ARM_FPU("fp-armv8", FK_FP_ARMV8, FV_VFPV5, NS_None, FR_None)
-ARM_FPU("neon", FK_NEON, FV_VFPV3, NS_Neon, FR_None)
-ARM_FPU("neon-fp16", FK_NEON_FP16, FV_VFPV3_FP16, NS_Neon, FR_None)
-ARM_FPU("neon-vfpv4", FK_NEON_VFPV4, FV_VFPV4, NS_Neon, FR_None)
-ARM_FPU("neon-fp-armv8", FK_NEON_FP_ARMV8, FV_VFPV5, NS_Neon, FR_None)
-ARM_FPU("crypto-neon-fp-armv8", FK_CRYPTO_NEON_FP_ARMV8, FV_VFPV5, NS_Crypto,
- FR_None)
-ARM_FPU("softvfp", FK_SOFTVFP, FV_NONE, NS_None, FR_None)
+ARM_FPU("invalid", FK_INVALID, FPUVersion::NONE, NeonSupportLevel::None, FPURestriction::None)
+ARM_FPU("none", FK_NONE, FPUVersion::NONE, NeonSupportLevel::None, FPURestriction::None)
+ARM_FPU("vfp", FK_VFP, FPUVersion::VFPV2, NeonSupportLevel::None, FPURestriction::None)
+ARM_FPU("vfpv2", FK_VFPV2, FPUVersion::VFPV2, NeonSupportLevel::None, FPURestriction::None)
+ARM_FPU("vfpv3", FK_VFPV3, FPUVersion::VFPV3, NeonSupportLevel::None, FPURestriction::None)
+ARM_FPU("vfpv3-fp16", FK_VFPV3_FP16, FPUVersion::VFPV3_FP16, NeonSupportLevel::None, FPURestriction::None)
+ARM_FPU("vfpv3-d16", FK_VFPV3_D16, FPUVersion::VFPV3, NeonSupportLevel::None, FPURestriction::D16)
+ARM_FPU("vfpv3-d16-fp16", FK_VFPV3_D16_FP16, FPUVersion::VFPV3_FP16, NeonSupportLevel::None, FPURestriction::D16)
+ARM_FPU("vfpv3xd", FK_VFPV3XD, FPUVersion::VFPV3, NeonSupportLevel::None, FPURestriction::SP_D16)
+ARM_FPU("vfpv3xd-fp16", FK_VFPV3XD_FP16, FPUVersion::VFPV3_FP16, NeonSupportLevel::None, FPURestriction::SP_D16)
+ARM_FPU("vfpv4", FK_VFPV4, FPUVersion::VFPV4, NeonSupportLevel::None, FPURestriction::None)
+ARM_FPU("vfpv4-d16", FK_VFPV4_D16, FPUVersion::VFPV4, NeonSupportLevel::None, FPURestriction::D16)
+ARM_FPU("fpv4-sp-d16", FK_FPV4_SP_D16, FPUVersion::VFPV4, NeonSupportLevel::None, FPURestriction::SP_D16)
+ARM_FPU("fpv5-d16", FK_FPV5_D16, FPUVersion::VFPV5, NeonSupportLevel::None, FPURestriction::D16)
+ARM_FPU("fpv5-sp-d16", FK_FPV5_SP_D16, FPUVersion::VFPV5, NeonSupportLevel::None, FPURestriction::SP_D16)
+ARM_FPU("fp-armv8", FK_FP_ARMV8, FPUVersion::VFPV5, NeonSupportLevel::None, FPURestriction::None)
+ARM_FPU("neon", FK_NEON, FPUVersion::VFPV3, NeonSupportLevel::Neon, FPURestriction::None)
+ARM_FPU("neon-fp16", FK_NEON_FP16, FPUVersion::VFPV3_FP16, NeonSupportLevel::Neon, FPURestriction::None)
+ARM_FPU("neon-vfpv4", FK_NEON_VFPV4, FPUVersion::VFPV4, NeonSupportLevel::Neon, FPURestriction::None)
+ARM_FPU("neon-fp-armv8", FK_NEON_FP_ARMV8, FPUVersion::VFPV5, NeonSupportLevel::Neon, FPURestriction::None)
+ARM_FPU("crypto-neon-fp-armv8", FK_CRYPTO_NEON_FP_ARMV8, FPUVersion::VFPV5, NeonSupportLevel::Crypto,
+ FPURestriction::None)
+ARM_FPU("softvfp", FK_SOFTVFP, FPUVersion::NONE, NeonSupportLevel::None, FPURestriction::None)
#undef ARM_FPU
#ifndef ARM_ARCH
#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT)
#endif
-ARM_ARCH("invalid", AK_INVALID, nullptr, nullptr,
+ARM_ARCH("invalid", INVALID, "", "",
ARMBuildAttrs::CPUArch::Pre_v4, FK_NONE, ARM::AEK_NONE)
-ARM_ARCH("armv2", AK_ARMV2, "2", "v2", ARMBuildAttrs::CPUArch::Pre_v4,
+ARM_ARCH("armv2", ARMV2, "2", "v2", ARMBuildAttrs::CPUArch::Pre_v4,
FK_NONE, ARM::AEK_NONE)
-ARM_ARCH("armv2a", AK_ARMV2A, "2A", "v2a", ARMBuildAttrs::CPUArch::Pre_v4,
+ARM_ARCH("armv2a", ARMV2A, "2A", "v2a", ARMBuildAttrs::CPUArch::Pre_v4,
FK_NONE, ARM::AEK_NONE)
-ARM_ARCH("armv3", AK_ARMV3, "3", "v3", ARMBuildAttrs::CPUArch::Pre_v4,
+ARM_ARCH("armv3", ARMV3, "3", "v3", ARMBuildAttrs::CPUArch::Pre_v4,
FK_NONE, ARM::AEK_NONE)
-ARM_ARCH("armv3m", AK_ARMV3M, "3M", "v3m", ARMBuildAttrs::CPUArch::Pre_v4,
+ARM_ARCH("armv3m", ARMV3M, "3M", "v3m", ARMBuildAttrs::CPUArch::Pre_v4,
FK_NONE, ARM::AEK_NONE)
-ARM_ARCH("armv4", AK_ARMV4, "4", "v4", ARMBuildAttrs::CPUArch::v4,
+ARM_ARCH("armv4", ARMV4, "4", "v4", ARMBuildAttrs::CPUArch::v4,
FK_NONE, ARM::AEK_NONE)
-ARM_ARCH("armv4t", AK_ARMV4T, "4T", "v4t", ARMBuildAttrs::CPUArch::v4T,
+ARM_ARCH("armv4t", ARMV4T, "4T", "v4t", ARMBuildAttrs::CPUArch::v4T,
FK_NONE, ARM::AEK_NONE)
-ARM_ARCH("armv5t", AK_ARMV5T, "5T", "v5", ARMBuildAttrs::CPUArch::v5T,
+ARM_ARCH("armv5t", ARMV5T, "5T", "v5", ARMBuildAttrs::CPUArch::v5T,
FK_NONE, ARM::AEK_NONE)
-ARM_ARCH("armv5te", AK_ARMV5TE, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE,
+ARM_ARCH("armv5te", ARMV5TE, "5TE", "v5e", ARMBuildAttrs::CPUArch::v5TE,
FK_NONE, ARM::AEK_DSP)
-ARM_ARCH("armv5tej", AK_ARMV5TEJ, "5TEJ", "v5e", ARMBuildAttrs::CPUArch::v5TEJ,
+ARM_ARCH("armv5tej", ARMV5TEJ, "5TEJ", "v5e", ARMBuildAttrs::CPUArch::v5TEJ,
FK_NONE, ARM::AEK_DSP)
-ARM_ARCH("armv6", AK_ARMV6, "6", "v6", ARMBuildAttrs::CPUArch::v6,
+ARM_ARCH("armv6", ARMV6, "6", "v6", ARMBuildAttrs::CPUArch::v6,
FK_VFPV2, ARM::AEK_DSP)
-ARM_ARCH("armv6k", AK_ARMV6K, "6K", "v6k", ARMBuildAttrs::CPUArch::v6K,
+ARM_ARCH("armv6k", ARMV6K, "6K", "v6k", ARMBuildAttrs::CPUArch::v6K,
FK_VFPV2, ARM::AEK_DSP)
-ARM_ARCH("armv6t2", AK_ARMV6T2, "6T2", "v6t2", ARMBuildAttrs::CPUArch::v6T2,
+ARM_ARCH("armv6t2", ARMV6T2, "6T2", "v6t2", ARMBuildAttrs::CPUArch::v6T2,
FK_NONE, ARM::AEK_DSP)
-ARM_ARCH("armv6kz", AK_ARMV6KZ, "6KZ", "v6kz", ARMBuildAttrs::CPUArch::v6KZ,
+ARM_ARCH("armv6kz", ARMV6KZ, "6KZ", "v6kz", ARMBuildAttrs::CPUArch::v6KZ,
FK_VFPV2, (ARM::AEK_SEC | ARM::AEK_DSP))
-ARM_ARCH("armv6-m", AK_ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M,
+ARM_ARCH("armv6-m", ARMV6M, "6-M", "v6m", ARMBuildAttrs::CPUArch::v6_M,
FK_NONE, ARM::AEK_NONE)
-ARM_ARCH("armv7-a", AK_ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7,
+ARM_ARCH("armv7-a", ARMV7A, "7-A", "v7", ARMBuildAttrs::CPUArch::v7,
FK_NEON, ARM::AEK_DSP)
-ARM_ARCH("armv7ve", AK_ARMV7VE, "7VE", "v7ve", ARMBuildAttrs::CPUArch::v7,
+ARM_ARCH("armv7ve", ARMV7VE, "7VE", "v7ve", ARMBuildAttrs::CPUArch::v7,
FK_NEON, (ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT |
ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP))
-ARM_ARCH("armv7-r", AK_ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7,
+ARM_ARCH("armv7-r", ARMV7R, "7-R", "v7r", ARMBuildAttrs::CPUArch::v7,
FK_NONE, (ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP))
-ARM_ARCH("armv7-m", AK_ARMV7M, "7-M", "v7m", ARMBuildAttrs::CPUArch::v7,
+ARM_ARCH("armv7-m", ARMV7M, "7-M", "v7m", ARMBuildAttrs::CPUArch::v7,
FK_NONE, ARM::AEK_HWDIVTHUMB)
-ARM_ARCH("armv7e-m", AK_ARMV7EM, "7E-M", "v7em", ARMBuildAttrs::CPUArch::v7E_M,
+ARM_ARCH("armv7e-m", ARMV7EM, "7E-M", "v7em", ARMBuildAttrs::CPUArch::v7E_M,
FK_NONE, (ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP))
-ARM_ARCH("armv8-a", AK_ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8_A,
+ARM_ARCH("armv8-a", ARMV8A, "8-A", "v8", ARMBuildAttrs::CPUArch::v8_A,
FK_CRYPTO_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC))
-ARM_ARCH("armv8.1-a", AK_ARMV8_1A, "8.1-A", "v8.1a",
+ARM_ARCH("armv8.1-a", ARMV8_1A, "8.1-A", "v8.1a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC))
-ARM_ARCH("armv8.2-a", AK_ARMV8_2A, "8.2-A", "v8.2a",
+ARM_ARCH("armv8.2-a", ARMV8_2A, "8.2-A", "v8.2a",
ARMBuildAttrs::CPUArch::v8_A, FK_CRYPTO_NEON_FP_ARMV8,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB | ARM::AEK_DSP | ARM::AEK_CRC | ARM::AEK_RAS))
-ARM_ARCH("armv8-r", AK_ARMV8R, "8-R", "v8r", ARMBuildAttrs::CPUArch::v8_R,
+ARM_ARCH("armv8-r", ARMV8R, "8-R", "v8r", ARMBuildAttrs::CPUArch::v8_R,
FK_NEON_FP_ARMV8,
(ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB |
ARM::AEK_DSP | ARM::AEK_CRC))
-ARM_ARCH("armv8-m.base", AK_ARMV8MBaseline, "8-M.Baseline", "v8m.base",
+ARM_ARCH("armv8-m.base", ARMV8MBaseline, "8-M.Baseline", "v8m.base",
ARMBuildAttrs::CPUArch::v8_M_Base, FK_NONE, ARM::AEK_HWDIVTHUMB)
-ARM_ARCH("armv8-m.main", AK_ARMV8MMainline, "8-M.Mainline", "v8m.main",
+ARM_ARCH("armv8-m.main", ARMV8MMainline, "8-M.Mainline", "v8m.main",
ARMBuildAttrs::CPUArch::v8_M_Main, FK_FPV5_D16, ARM::AEK_HWDIVTHUMB)
// Non-standard Arch names.
-ARM_ARCH("iwmmxt", AK_IWMMXT, "iwmmxt", "", ARMBuildAttrs::CPUArch::v5TE,
+ARM_ARCH("iwmmxt", IWMMXT, "iwmmxt", "", ARMBuildAttrs::CPUArch::v5TE,
FK_NONE, ARM::AEK_NONE)
-ARM_ARCH("iwmmxt2", AK_IWMMXT2, "iwmmxt2", "", ARMBuildAttrs::CPUArch::v5TE,
+ARM_ARCH("iwmmxt2", IWMMXT2, "iwmmxt2", "", ARMBuildAttrs::CPUArch::v5TE,
FK_NONE, ARM::AEK_NONE)
-ARM_ARCH("xscale", AK_XSCALE, "xscale", "v5e", ARMBuildAttrs::CPUArch::v5TE,
+ARM_ARCH("xscale", XSCALE, "xscale", "v5e", ARMBuildAttrs::CPUArch::v5TE,
FK_NONE, ARM::AEK_NONE)
-ARM_ARCH("armv7s", AK_ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7,
+ARM_ARCH("armv7s", ARMV7S, "7-S", "v7s", ARMBuildAttrs::CPUArch::v7,
FK_NEON_VFPV4, ARM::AEK_DSP)
-ARM_ARCH("armv7k", AK_ARMV7K, "7-K", "v7k", ARMBuildAttrs::CPUArch::v7,
+ARM_ARCH("armv7k", ARMV7K, "7-K", "v7k", ARMBuildAttrs::CPUArch::v7,
FK_NONE, ARM::AEK_DSP)
#undef ARM_ARCH
#ifndef ARM_CPU_NAME
#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT)
#endif
-ARM_CPU_NAME("arm2", AK_ARMV2, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("arm3", AK_ARMV2A, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("arm6", AK_ARMV3, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("arm7m", AK_ARMV3M, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("arm8", AK_ARMV4, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm810", AK_ARMV4, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("strongarm", AK_ARMV4, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("strongarm110", AK_ARMV4, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("strongarm1100", AK_ARMV4, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("strongarm1110", AK_ARMV4, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm7tdmi", AK_ARMV4T, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("arm7tdmi-s", AK_ARMV4T, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm710t", AK_ARMV4T, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm720t", AK_ARMV4T, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm9", AK_ARMV4T, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm9tdmi", AK_ARMV4T, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm920", AK_ARMV4T, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm920t", AK_ARMV4T, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm922t", AK_ARMV4T, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm9312", AK_ARMV4T, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm940t", AK_ARMV4T, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("ep9312", AK_ARMV4T, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm10tdmi", AK_ARMV5T, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("arm1020t", AK_ARMV5T, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm9e", AK_ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm946e-s", AK_ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm966e-s", AK_ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm968e-s", AK_ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm10e", AK_ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm1020e", AK_ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm1022e", AK_ARMV5TE, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("arm926ej-s", AK_ARMV5TEJ, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("arm1136j-s", AK_ARMV6, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm1136jf-s", AK_ARMV6, FK_VFPV2, true, ARM::AEK_NONE)
-ARM_CPU_NAME("arm1136jz-s", AK_ARMV6, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm1176j-s", AK_ARMV6K, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("arm1176jz-s", AK_ARMV6KZ, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("mpcore", AK_ARMV6K, FK_VFPV2, false, ARM::AEK_NONE)
-ARM_CPU_NAME("mpcorenovfp", AK_ARMV6K, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("arm1176jzf-s", AK_ARMV6KZ, FK_VFPV2, true, ARM::AEK_NONE)
-ARM_CPU_NAME("arm1156t2-s", AK_ARMV6T2, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("arm1156t2f-s", AK_ARMV6T2, FK_VFPV2, false, ARM::AEK_NONE)
-ARM_CPU_NAME("cortex-m0", AK_ARMV6M, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("cortex-m0plus", AK_ARMV6M, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("cortex-m1", AK_ARMV6M, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("sc000", AK_ARMV6M, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("cortex-a5", AK_ARMV7A, FK_NEON_VFPV4, false,
+ARM_CPU_NAME("arm2", ARMV2, FK_NONE, true, ARM::AEK_NONE)
+ARM_CPU_NAME("arm3", ARMV2A, FK_NONE, true, ARM::AEK_NONE)
+ARM_CPU_NAME("arm6", ARMV3, FK_NONE, true, ARM::AEK_NONE)
+ARM_CPU_NAME("arm7m", ARMV3M, FK_NONE, true, ARM::AEK_NONE)
+ARM_CPU_NAME("arm8", ARMV4, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm810", ARMV4, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("strongarm", ARMV4, FK_NONE, true, ARM::AEK_NONE)
+ARM_CPU_NAME("strongarm110", ARMV4, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("strongarm1100", ARMV4, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("strongarm1110", ARMV4, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm7tdmi", ARMV4T, FK_NONE, true, ARM::AEK_NONE)
+ARM_CPU_NAME("arm7tdmi-s", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm710t", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm720t", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm9", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm9tdmi", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm920", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm920t", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm922t", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm9312", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm940t", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("ep9312", ARMV4T, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm10tdmi", ARMV5T, FK_NONE, true, ARM::AEK_NONE)
+ARM_CPU_NAME("arm1020t", ARMV5T, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm9e", ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm946e-s", ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm966e-s", ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm968e-s", ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm10e", ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm1020e", ARMV5TE, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm1022e", ARMV5TE, FK_NONE, true, ARM::AEK_NONE)
+ARM_CPU_NAME("arm926ej-s", ARMV5TEJ, FK_NONE, true, ARM::AEK_NONE)
+ARM_CPU_NAME("arm1136j-s", ARMV6, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm1136jf-s", ARMV6, FK_VFPV2, true, ARM::AEK_NONE)
+ARM_CPU_NAME("arm1136jz-s", ARMV6, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm1176j-s", ARMV6K, FK_NONE, true, ARM::AEK_NONE)
+ARM_CPU_NAME("arm1176jz-s", ARMV6KZ, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("mpcore", ARMV6K, FK_VFPV2, false, ARM::AEK_NONE)
+ARM_CPU_NAME("mpcorenovfp", ARMV6K, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("arm1176jzf-s", ARMV6KZ, FK_VFPV2, true, ARM::AEK_NONE)
+ARM_CPU_NAME("arm1156t2-s", ARMV6T2, FK_NONE, true, ARM::AEK_NONE)
+ARM_CPU_NAME("arm1156t2f-s", ARMV6T2, FK_VFPV2, false, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-m0", ARMV6M, FK_NONE, true, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-m0plus", ARMV6M, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-m1", ARMV6M, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("sc000", ARMV6M, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-a5", ARMV7A, FK_NEON_VFPV4, false,
(ARM::AEK_SEC | ARM::AEK_MP))
-ARM_CPU_NAME("cortex-a7", AK_ARMV7A, FK_NEON_VFPV4, false,
+ARM_CPU_NAME("cortex-a7", ARMV7A, FK_NEON_VFPV4, false,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB))
-ARM_CPU_NAME("cortex-a8", AK_ARMV7A, FK_NEON, false, ARM::AEK_SEC)
-ARM_CPU_NAME("cortex-a9", AK_ARMV7A, FK_NEON_FP16, false, (ARM::AEK_SEC | ARM::AEK_MP))
-ARM_CPU_NAME("cortex-a12", AK_ARMV7A, FK_NEON_VFPV4, false,
+ARM_CPU_NAME("cortex-a8", ARMV7A, FK_NEON, false, ARM::AEK_SEC)
+ARM_CPU_NAME("cortex-a9", ARMV7A, FK_NEON_FP16, false, (ARM::AEK_SEC | ARM::AEK_MP))
+ARM_CPU_NAME("cortex-a12", ARMV7A, FK_NEON_VFPV4, false,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB))
-ARM_CPU_NAME("cortex-a15", AK_ARMV7A, FK_NEON_VFPV4, false,
+ARM_CPU_NAME("cortex-a15", ARMV7A, FK_NEON_VFPV4, false,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB))
-ARM_CPU_NAME("cortex-a17", AK_ARMV7A, FK_NEON_VFPV4, false,
+ARM_CPU_NAME("cortex-a17", ARMV7A, FK_NEON_VFPV4, false,
(ARM::AEK_SEC | ARM::AEK_MP | ARM::AEK_VIRT | ARM::AEK_HWDIVARM |
ARM::AEK_HWDIVTHUMB))
-ARM_CPU_NAME("krait", AK_ARMV7A, FK_NEON_VFPV4, false,
+ARM_CPU_NAME("krait", ARMV7A, FK_NEON_VFPV4, false,
(ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB))
-ARM_CPU_NAME("cortex-r4", AK_ARMV7R, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("cortex-r4f", AK_ARMV7R, FK_VFPV3_D16, false, ARM::AEK_NONE)
-ARM_CPU_NAME("cortex-r5", AK_ARMV7R, FK_VFPV3_D16, false,
+ARM_CPU_NAME("cortex-r4", ARMV7R, FK_NONE, true, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-r4f", ARMV7R, FK_VFPV3_D16, false, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-r5", ARMV7R, FK_VFPV3_D16, false,
(ARM::AEK_MP | ARM::AEK_HWDIVARM))
-ARM_CPU_NAME("cortex-r7", AK_ARMV7R, FK_VFPV3_D16_FP16, false,
+ARM_CPU_NAME("cortex-r7", ARMV7R, FK_VFPV3_D16_FP16, false,
(ARM::AEK_MP | ARM::AEK_HWDIVARM))
-ARM_CPU_NAME("cortex-r8", AK_ARMV7R, FK_VFPV3_D16_FP16, false,
+ARM_CPU_NAME("cortex-r8", ARMV7R, FK_VFPV3_D16_FP16, false,
(ARM::AEK_MP | ARM::AEK_HWDIVARM))
-ARM_CPU_NAME("cortex-r52", AK_ARMV8R, FK_NEON_FP_ARMV8, true, ARM::AEK_NONE)
-ARM_CPU_NAME("sc300", AK_ARMV7M, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("cortex-m3", AK_ARMV7M, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("cortex-m4", AK_ARMV7EM, FK_FPV4_SP_D16, true, ARM::AEK_NONE)
-ARM_CPU_NAME("cortex-m7", AK_ARMV7EM, FK_FPV5_D16, false, ARM::AEK_NONE)
-ARM_CPU_NAME("cortex-m23", AK_ARMV8MBaseline, FK_NONE, false, ARM::AEK_NONE)
-ARM_CPU_NAME("cortex-m33", AK_ARMV8MMainline, FK_FPV5_SP_D16, false, ARM::AEK_DSP)
-ARM_CPU_NAME("cortex-a32", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
-ARM_CPU_NAME("cortex-a35", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
-ARM_CPU_NAME("cortex-a53", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
-ARM_CPU_NAME("cortex-a57", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
-ARM_CPU_NAME("cortex-a72", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
-ARM_CPU_NAME("cortex-a73", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
-ARM_CPU_NAME("cyclone", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
-ARM_CPU_NAME("exynos-m1", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
-ARM_CPU_NAME("exynos-m2", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
-ARM_CPU_NAME("exynos-m3", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
-ARM_CPU_NAME("kryo", AK_ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
+ARM_CPU_NAME("cortex-r52", ARMV8R, FK_NEON_FP_ARMV8, true, ARM::AEK_NONE)
+ARM_CPU_NAME("sc300", ARMV7M, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-m3", ARMV7M, FK_NONE, true, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-m4", ARMV7EM, FK_FPV4_SP_D16, true, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-m7", ARMV7EM, FK_FPV5_D16, false, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-m23", ARMV8MBaseline, FK_NONE, false, ARM::AEK_NONE)
+ARM_CPU_NAME("cortex-m33", ARMV8MMainline, FK_FPV5_SP_D16, false, ARM::AEK_DSP)
+ARM_CPU_NAME("cortex-a32", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
+ARM_CPU_NAME("cortex-a35", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
+ARM_CPU_NAME("cortex-a53", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
+ARM_CPU_NAME("cortex-a57", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
+ARM_CPU_NAME("cortex-a72", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
+ARM_CPU_NAME("cortex-a73", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
+ARM_CPU_NAME("cyclone", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
+ARM_CPU_NAME("exynos-m1", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
+ARM_CPU_NAME("exynos-m2", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
+ARM_CPU_NAME("exynos-m3", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
+ARM_CPU_NAME("kryo", ARMV8A, FK_CRYPTO_NEON_FP_ARMV8, false, ARM::AEK_CRC)
// Non-standard Arch names.
-ARM_CPU_NAME("iwmmxt", AK_IWMMXT, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("xscale", AK_XSCALE, FK_NONE, true, ARM::AEK_NONE)
-ARM_CPU_NAME("swift", AK_ARMV7S, FK_NEON_VFPV4, true,
+ARM_CPU_NAME("iwmmxt", IWMMXT, FK_NONE, true, ARM::AEK_NONE)
+ARM_CPU_NAME("xscale", XSCALE, FK_NONE, true, ARM::AEK_NONE)
+ARM_CPU_NAME("swift", ARMV7S, FK_NEON_VFPV4, true,
(ARM::AEK_HWDIVARM | ARM::AEK_HWDIVTHUMB))
// Invalid CPU
-ARM_CPU_NAME("invalid", AK_INVALID, FK_INVALID, true, ARM::AEK_INVALID)
+ARM_CPU_NAME("invalid", INVALID, FK_INVALID, true, ARM::AEK_INVALID)
#undef ARM_CPU_NAME
// back-end to TableGen to create these clean tables.
namespace ARM {
-// FPU names.
-enum FPUKind {
-#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND,
-#include "ARMTargetParser.def"
- FK_LAST
+// FPU Version
+enum class FPUVersion {
+ NONE,
+ VFPV2,
+ VFPV3,
+ VFPV3_FP16,
+ VFPV4,
+ VFPV5
};
-// FPU Version
-enum FPUVersion {
- FV_NONE = 0,
- FV_VFPV2,
- FV_VFPV3,
- FV_VFPV3_FP16,
- FV_VFPV4,
- FV_VFPV5
+// An FPU name restricts the FPU in one of three ways:
+enum class FPURestriction {
+ None = 0, ///< No restriction
+ D16, ///< Only 16 D registers
+ SP_D16 ///< Only single-precision instructions, with 16 D registers
};
// An FPU name implies one of three levels of Neon support:
-enum NeonSupportLevel {
- NS_None = 0, ///< No Neon
- NS_Neon, ///< Neon
- NS_Crypto ///< Neon with Crypto
+enum class NeonSupportLevel {
+ None = 0, ///< No Neon
+ Neon, ///< Neon
+ Crypto ///< Neon with Crypto
};
-// An FPU name restricts the FPU in one of three ways:
-enum FPURestriction {
- FR_None = 0, ///< No restriction
- FR_D16, ///< Only 16 D registers
- FR_SP_D16 ///< Only single-precision instructions, with 16 D registers
+// FPU names.
+enum FPUKind {
+#define ARM_FPU(NAME, KIND, VERSION, NEON_SUPPORT, RESTRICTION) KIND,
+#include "ARMTargetParser.def"
+ FK_LAST
};
// Arch names.
-enum ArchKind {
+enum class ArchKind {
#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID,
#include "ARMTargetParser.def"
- AK_LAST
};
// Arch extension modifiers for CPUs.
};
// ISA kinds.
-enum ISAKind { IK_INVALID = 0, IK_ARM, IK_THUMB, IK_AARCH64 };
+enum class ISAKind { INVALID = 0, ARM, THUMB, AARCH64 };
// Endianness
// FIXME: BE8 vs. BE32?
-enum EndianKind { EK_INVALID = 0, EK_LITTLE, EK_BIG };
+enum class EndianKind { INVALID = 0, LITTLE, BIG };
// v6/v7/v8 Profile
-enum ProfileKind { PK_INVALID = 0, PK_A, PK_R, PK_M };
+enum class ProfileKind { INVALID = 0, A, R, M };
StringRef getCanonicalArchName(StringRef Arch);
// Information by ID
StringRef getFPUName(unsigned FPUKind);
-unsigned getFPUVersion(unsigned FPUKind);
-unsigned getFPUNeonSupportLevel(unsigned FPUKind);
-unsigned getFPURestriction(unsigned FPUKind);
+FPUVersion getFPUVersion(unsigned FPUKind);
+NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind);
+FPURestriction getFPURestriction(unsigned FPUKind);
// FIXME: These should be moved to TargetTuple once it exists
bool getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features);
bool getExtensionFeatures(unsigned Extensions,
std::vector<StringRef> &Features);
-StringRef getArchName(unsigned ArchKind);
-unsigned getArchAttr(unsigned ArchKind);
-StringRef getCPUAttr(unsigned ArchKind);
-StringRef getSubArch(unsigned ArchKind);
+StringRef getArchName(ArchKind AK);
+unsigned getArchAttr(ArchKind AK);
+StringRef getCPUAttr(ArchKind AK);
+StringRef getSubArch(ArchKind AK);
StringRef getArchExtName(unsigned ArchExtKind);
StringRef getArchExtFeature(StringRef ArchExt);
StringRef getHWDivName(unsigned HWDivKind);
// Information by Name
-unsigned getDefaultFPU(StringRef CPU, unsigned ArchKind);
-unsigned getDefaultExtensions(StringRef CPU, unsigned ArchKind);
+unsigned getDefaultFPU(StringRef CPU, ArchKind AK);
+unsigned getDefaultExtensions(StringRef CPU, ArchKind AK);
StringRef getDefaultCPU(StringRef Arch);
// Parser
unsigned parseHWDiv(StringRef HWDiv);
unsigned parseFPU(StringRef FPU);
-unsigned parseArch(StringRef Arch);
+ArchKind parseArch(StringRef Arch);
unsigned parseArchExt(StringRef ArchExt);
-unsigned parseCPUArch(StringRef CPU);
-unsigned parseArchISA(StringRef Arch);
-unsigned parseArchEndian(StringRef Arch);
-unsigned parseArchProfile(StringRef Arch);
+ArchKind parseCPUArch(StringRef CPU);
+ISAKind parseArchISA(StringRef Arch);
+EndianKind parseArchEndian(StringRef Arch);
+ProfileKind parseArchProfile(StringRef Arch);
unsigned parseArchVersion(StringRef Arch);
StringRef computeDefaultTargetABI(const Triple &TT, StringRef CPU);
enum class ArchKind {
#define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) ID,
#include "AArch64TargetParser.def"
- AK_LAST
};
// Arch extension modifiers for CPUs.
// Information by ID
StringRef getFPUName(unsigned FPUKind);
-unsigned getFPUVersion(unsigned FPUKind);
-unsigned getFPUNeonSupportLevel(unsigned FPUKind);
-unsigned getFPURestriction(unsigned FPUKind);
+ARM::FPUVersion getFPUVersion(unsigned FPUKind);
+ARM::NeonSupportLevel getFPUNeonSupportLevel(unsigned FPUKind);
+ARM::FPURestriction getFPURestriction(unsigned FPUKind);
// FIXME: These should be moved to TargetTuple once it exists
bool getFPUFeatures(unsigned FPUKind, std::vector<StringRef> &Features);
bool getExtensionFeatures(unsigned Extensions,
std::vector<StringRef> &Features);
-bool getArchFeatures(unsigned ArchKind, std::vector<StringRef> &Features);
+bool getArchFeatures(ArchKind AK, std::vector<StringRef> &Features);
-StringRef getArchName(unsigned ArchKind);
-unsigned getArchAttr(unsigned ArchKind);
-StringRef getCPUAttr(unsigned ArchKind);
-StringRef getSubArch(unsigned ArchKind);
+StringRef getArchName(ArchKind AK);
+unsigned getArchAttr(ArchKind AK);
+StringRef getCPUAttr(ArchKind AK);
+StringRef getSubArch(ArchKind AK);
StringRef getArchExtName(unsigned ArchExtKind);
StringRef getArchExtFeature(StringRef ArchExt);
unsigned checkArchVersion(StringRef Arch);
// Information by Name
-unsigned getDefaultFPU(StringRef CPU, unsigned ArchKind);
-unsigned getDefaultExtensions(StringRef CPU, unsigned ArchKind);
+unsigned getDefaultFPU(StringRef CPU, ArchKind AK);
+unsigned getDefaultExtensions(StringRef CPU, ArchKind AK);
StringRef getDefaultCPU(StringRef Arch);
// Parser
unsigned parseFPU(StringRef FPU);
-unsigned parseArch(StringRef Arch);
+AArch64::ArchKind parseArch(StringRef Arch);
unsigned parseArchExt(StringRef ArchExt);
-unsigned parseCPUArch(StringRef CPU);
-unsigned parseArchISA(StringRef Arch);
-unsigned parseArchEndian(StringRef Arch);
-unsigned parseArchProfile(StringRef Arch);
+ArchKind parseCPUArch(StringRef CPU);
+ARM::ISAKind parseArchISA(StringRef Arch);
+ARM::EndianKind parseArchEndian(StringRef Arch);
+ARM::ProfileKind parseArchProfile(StringRef Arch);
unsigned parseArchVersion(StringRef Arch);
} // namespace AArch64
ArchNames<ARM::ArchKind> ARCHNames[] = {
#define ARM_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) \
{NAME, sizeof(NAME) - 1, CPU_ATTR, sizeof(CPU_ATTR) - 1, SUB_ARCH, \
- sizeof(SUB_ARCH) - 1, ARCH_FPU, ARCH_BASE_EXT, ID, ARCH_ATTR},
+ sizeof(SUB_ARCH) - 1, ARCH_FPU, ARCH_BASE_EXT, ARM::ArchKind::ID, ARCH_ATTR},
#include "llvm/Support/ARMTargetParser.def"
};
};
CpuNames<ARM::ArchKind> CPUNames[] = {
#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
- { NAME, sizeof(NAME) - 1, ID, IS_DEFAULT, DEFAULT_EXT },
+ { NAME, sizeof(NAME) - 1, ARM::ArchKind::ID, IS_DEFAULT, DEFAULT_EXT },
#include "llvm/Support/ARMTargetParser.def"
};
// Information by ID
// ======================================================= //
-StringRef llvm::ARM::getFPUName(unsigned FPUKind) {
+StringRef ARM::getFPUName(unsigned FPUKind) {
if (FPUKind >= ARM::FK_LAST)
return StringRef();
return FPUNames[FPUKind].getName();
}
-unsigned llvm::ARM::getFPUVersion(unsigned FPUKind) {
+FPUVersion ARM::getFPUVersion(unsigned FPUKind) {
if (FPUKind >= ARM::FK_LAST)
- return 0;
+ return FPUVersion::NONE;
return FPUNames[FPUKind].FPUVersion;
}
-unsigned llvm::ARM::getFPUNeonSupportLevel(unsigned FPUKind) {
+ARM::NeonSupportLevel ARM::getFPUNeonSupportLevel(unsigned FPUKind) {
if (FPUKind >= ARM::FK_LAST)
- return 0;
+ return ARM::NeonSupportLevel::None;
return FPUNames[FPUKind].NeonSupport;
}
-unsigned llvm::ARM::getFPURestriction(unsigned FPUKind) {
+ARM::FPURestriction ARM::getFPURestriction(unsigned FPUKind) {
if (FPUKind >= ARM::FK_LAST)
- return 0;
+ return ARM::FPURestriction::None;
return FPUNames[FPUKind].Restriction;
}
-unsigned llvm::ARM::getDefaultFPU(StringRef CPU, unsigned ArchKind) {
+unsigned llvm::ARM::getDefaultFPU(StringRef CPU, ArchKind AK) {
if (CPU == "generic")
- return ARCHNames[ArchKind].DefaultFPU;
+ return ARCHNames[static_cast<unsigned>(AK)].DefaultFPU;
return StringSwitch<unsigned>(CPU)
#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
.Default(ARM::FK_INVALID);
}
-unsigned llvm::ARM::getDefaultExtensions(StringRef CPU, unsigned ArchKind) {
+unsigned llvm::ARM::getDefaultExtensions(StringRef CPU, ArchKind AK) {
if (CPU == "generic")
- return ARCHNames[ArchKind].ArchBaseExtensions;
+ return ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
return StringSwitch<unsigned>(CPU)
#define ARM_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
- .Case(NAME, ARCHNames[ID].ArchBaseExtensions | DEFAULT_EXT)
+ .Case(NAME, ARCHNames[static_cast<unsigned>(ARM::ArchKind::ID)]\
+ .ArchBaseExtensions | DEFAULT_EXT)
#include "llvm/Support/ARMTargetParser.def"
.Default(ARM::AEK_INVALID);
}
// fp-only-sp and d16 subtarget features are independent of each other, so we
// must enable/disable both.
switch (FPUNames[FPUKind].Restriction) {
- case ARM::FR_SP_D16:
+ case ARM::FPURestriction::SP_D16:
Features.push_back("+fp-only-sp");
Features.push_back("+d16");
break;
- case ARM::FR_D16:
+ case ARM::FPURestriction::D16:
Features.push_back("-fp-only-sp");
Features.push_back("+d16");
break;
- case ARM::FR_None:
+ case ARM::FPURestriction::None:
Features.push_back("-fp-only-sp");
Features.push_back("-d16");
break;
// higher. We also have to make sure to disable fp16 when vfp4 is disabled,
// as +vfp4 implies +fp16 but -vfp4 does not imply -fp16.
switch (FPUNames[FPUKind].FPUVersion) {
- case ARM::FV_VFPV5:
+ case ARM::FPUVersion::VFPV5:
Features.push_back("+fp-armv8");
break;
- case ARM::FV_VFPV4:
+ case ARM::FPUVersion::VFPV4:
Features.push_back("+vfp4");
Features.push_back("-fp-armv8");
break;
- case ARM::FV_VFPV3_FP16:
+ case ARM::FPUVersion::VFPV3_FP16:
Features.push_back("+vfp3");
Features.push_back("+fp16");
Features.push_back("-vfp4");
Features.push_back("-fp-armv8");
break;
- case ARM::FV_VFPV3:
+ case ARM::FPUVersion::VFPV3:
Features.push_back("+vfp3");
Features.push_back("-fp16");
Features.push_back("-vfp4");
Features.push_back("-fp-armv8");
break;
- case ARM::FV_VFPV2:
+ case ARM::FPUVersion::VFPV2:
Features.push_back("+vfp2");
Features.push_back("-vfp3");
Features.push_back("-fp16");
Features.push_back("-vfp4");
Features.push_back("-fp-armv8");
break;
- case ARM::FV_NONE:
+ case ARM::FPUVersion::NONE:
Features.push_back("-vfp2");
Features.push_back("-vfp3");
Features.push_back("-fp16");
// crypto includes neon, so we handle this similarly to FPU version.
switch (FPUNames[FPUKind].NeonSupport) {
- case ARM::NS_Crypto:
+ case ARM::NeonSupportLevel::Crypto:
Features.push_back("+neon");
Features.push_back("+crypto");
break;
- case ARM::NS_Neon:
+ case ARM::NeonSupportLevel::Neon:
Features.push_back("+neon");
Features.push_back("-crypto");
break;
- case ARM::NS_None:
+ case ARM::NeonSupportLevel::None:
Features.push_back("-neon");
Features.push_back("-crypto");
break;
return true;
}
-StringRef llvm::ARM::getArchName(unsigned ArchKind) {
- if (ArchKind >= ARM::AK_LAST)
- return StringRef();
- return ARCHNames[ArchKind].getName();
+StringRef llvm::ARM::getArchName(ArchKind AK) {
+ return ARCHNames[static_cast<unsigned>(AK)].getName();
}
-StringRef llvm::ARM::getCPUAttr(unsigned ArchKind) {
- if (ArchKind == ARM::AK_INVALID || ArchKind >= ARM::AK_LAST)
- return StringRef();
- return ARCHNames[ArchKind].getCPUAttr();
+StringRef llvm::ARM::getCPUAttr(ArchKind AK) {
+ return ARCHNames[static_cast<unsigned>(AK)].getCPUAttr();
}
-StringRef llvm::ARM::getSubArch(unsigned ArchKind) {
- if (ArchKind == ARM::AK_INVALID || ArchKind >= ARM::AK_LAST)
- return StringRef();
- return ARCHNames[ArchKind].getSubArch();
+StringRef llvm::ARM::getSubArch(ArchKind AK) {
+ return ARCHNames[static_cast<unsigned>(AK)].getSubArch();
}
-unsigned llvm::ARM::getArchAttr(unsigned ArchKind) {
- if (ArchKind >= ARM::AK_LAST)
- return ARMBuildAttrs::CPUArch::Pre_v4;
- return ARCHNames[ArchKind].ArchAttr;
+unsigned llvm::ARM::getArchAttr(ArchKind AK) {
+ return ARCHNames[static_cast<unsigned>(AK)].ArchAttr;
}
StringRef llvm::ARM::getArchExtName(unsigned ArchExtKind) {
}
StringRef llvm::ARM::getDefaultCPU(StringRef Arch) {
- unsigned AK = parseArch(Arch);
- if (AK == ARM::AK_INVALID)
+ ArchKind AK = parseArch(Arch);
+ if (AK == ARM::ArchKind::INVALID)
return StringRef();
// Look for multiple AKs to find the default for pair AK+Name.
return ARM::getFPUName(FPUKind);
}
-unsigned llvm::AArch64::getFPUVersion(unsigned FPUKind) {
+ARM::FPUVersion AArch64::getFPUVersion(unsigned FPUKind) {
return ARM::getFPUVersion(FPUKind);
}
-unsigned llvm::AArch64::getFPUNeonSupportLevel(unsigned FPUKind) {
+ARM::NeonSupportLevel AArch64::getFPUNeonSupportLevel(unsigned FPUKind) {
return ARM::getFPUNeonSupportLevel( FPUKind);
}
-unsigned llvm::AArch64::getFPURestriction(unsigned FPUKind) {
+ARM::FPURestriction AArch64::getFPURestriction(unsigned FPUKind) {
return ARM::getFPURestriction(FPUKind);
}
-unsigned llvm::AArch64::getDefaultFPU(StringRef CPU, unsigned ArchKind) {
+unsigned llvm::AArch64::getDefaultFPU(StringRef CPU, ArchKind AK) {
if (CPU == "generic")
- return AArch64ARCHNames[ArchKind].DefaultFPU;
+ return AArch64ARCHNames[static_cast<unsigned>(AK)].DefaultFPU;
return StringSwitch<unsigned>(CPU)
#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
.Default(ARM::FK_INVALID);
}
-unsigned llvm::AArch64::getDefaultExtensions(StringRef CPU, unsigned ArchKind) {
+unsigned llvm::AArch64::getDefaultExtensions(StringRef CPU, ArchKind AK) {
if (CPU == "generic")
- return AArch64ARCHNames[ArchKind].ArchBaseExtensions;
+ return AArch64ARCHNames[static_cast<unsigned>(AK)].ArchBaseExtensions;
return StringSwitch<unsigned>(CPU)
#define AARCH64_CPU_NAME(NAME, ID, DEFAULT_FPU, IS_DEFAULT, DEFAULT_EXT) \
.Case(NAME, \
- AArch64ARCHNames[(unsigned)AArch64::ArchKind::ID].ArchBaseExtensions | \
+ AArch64ARCHNames[static_cast<unsigned>(AArch64::ArchKind::ID)] \
+ .ArchBaseExtensions | \
DEFAULT_EXT)
#include "llvm/Support/AArch64TargetParser.def"
.Default(AArch64::AEK_INVALID);
return ARM::getFPUFeatures(FPUKind, Features);
}
-bool llvm::AArch64::getArchFeatures(unsigned ArchKind,
- std::vector<StringRef> &Features) {
- if (ArchKind == static_cast<unsigned>(AArch64::ArchKind::AK_ARMV8_1A))
+bool llvm::AArch64::getArchFeatures(AArch64::ArchKind AK,
+ std::vector<StringRef> &Features) {
+ if (AK == AArch64::ArchKind::ARMV8_1A)
Features.push_back("+v8.1a");
- if (ArchKind == static_cast<unsigned>(AArch64::ArchKind::AK_ARMV8_2A))
+ if (AK == AArch64::ArchKind::ARMV8_2A)
Features.push_back("+v8.2a");
- return ArchKind > static_cast<unsigned>(AArch64::ArchKind::AK_INVALID) &&
- ArchKind < static_cast<unsigned>(AArch64::ArchKind::AK_LAST);
+ return AK != AArch64::ArchKind::INVALID;
}
-StringRef llvm::AArch64::getArchName(unsigned ArchKind) {
- if (ArchKind >= static_cast<unsigned>(AArch64::ArchKind::AK_LAST))
- return StringRef();
- return AArch64ARCHNames[ArchKind].getName();
+StringRef llvm::AArch64::getArchName(ArchKind AK) {
+ return AArch64ARCHNames[static_cast<unsigned>(AK)].getName();
}
-StringRef llvm::AArch64::getCPUAttr(unsigned ArchKind) {
- if (ArchKind == static_cast<unsigned>(AArch64::ArchKind::AK_INVALID) ||
- ArchKind >= static_cast<unsigned>(AArch64::ArchKind::AK_LAST))
- return StringRef();
- return AArch64ARCHNames[ArchKind].getCPUAttr();
+StringRef llvm::AArch64::getCPUAttr(ArchKind AK) {
+ return AArch64ARCHNames[static_cast<unsigned>(AK)].getCPUAttr();
}
-StringRef llvm::AArch64::getSubArch(unsigned ArchKind) {
- if (ArchKind == static_cast<unsigned>(AArch64::ArchKind::AK_INVALID) ||
- ArchKind >= static_cast<unsigned>(AArch64::ArchKind::AK_LAST))
- return StringRef();
- return AArch64ARCHNames[ArchKind].getSubArch();
+StringRef llvm::AArch64::getSubArch(ArchKind AK) {
+ return AArch64ARCHNames[static_cast<unsigned>(AK)].getSubArch();
}
-unsigned llvm::AArch64::getArchAttr(unsigned ArchKind) {
- if (ArchKind >= static_cast<unsigned>(AArch64::ArchKind::AK_LAST))
- return ARMBuildAttrs::CPUArch::v8_A;
- return AArch64ARCHNames[ArchKind].ArchAttr;
+unsigned llvm::AArch64::getArchAttr(ArchKind AK) {
+ return AArch64ARCHNames[static_cast<unsigned>(AK)].ArchAttr;
}
StringRef llvm::AArch64::getArchExtName(unsigned ArchExtKind) {
}
StringRef llvm::AArch64::getDefaultCPU(StringRef Arch) {
- unsigned AK = parseArch(Arch);
- if (AK == static_cast<unsigned>(AArch64::ArchKind::AK_INVALID))
+ AArch64::ArchKind AK = parseArch(Arch);
+ if (AK == ArchKind::INVALID)
return StringRef();
// Look for multiple AKs to find the default for pair AK+Name.
for (const auto &CPU : AArch64CPUNames)
- if (static_cast<unsigned>(CPU.ArchID) == AK && CPU.Default)
+ if (CPU.ArchID == AK && CPU.Default)
return CPU.getName();
// If we can't find a default then target the architecture instead
}
// Allows partial match, ex. "v7a" matches "armv7a".
-unsigned llvm::ARM::parseArch(StringRef Arch) {
+ARM::ArchKind ARM::parseArch(StringRef Arch) {
Arch = getCanonicalArchName(Arch);
StringRef Syn = getArchSynonym(Arch);
for (const auto A : ARCHNames) {
if (A.getName().endswith(Syn))
return A.ID;
}
- return ARM::AK_INVALID;
+ return ARM::ArchKind::INVALID;
}
unsigned llvm::ARM::parseArchExt(StringRef ArchExt) {
return ARM::AEK_INVALID;
}
-unsigned llvm::ARM::parseCPUArch(StringRef CPU) {
+ARM::ArchKind llvm::ARM::parseCPUArch(StringRef CPU) {
for (const auto C : CPUNames) {
if (CPU == C.getName())
return C.ArchID;
}
- return ARM::AK_INVALID;
+ return ARM::ArchKind::INVALID;
}
// ARM, Thumb, AArch64
-unsigned llvm::ARM::parseArchISA(StringRef Arch) {
- return StringSwitch<unsigned>(Arch)
- .StartsWith("aarch64", ARM::IK_AARCH64)
- .StartsWith("arm64", ARM::IK_AARCH64)
- .StartsWith("thumb", ARM::IK_THUMB)
- .StartsWith("arm", ARM::IK_ARM)
- .Default(ARM::IK_INVALID);
+ARM::ISAKind ARM::parseArchISA(StringRef Arch) {
+ return StringSwitch<ARM::ISAKind>(Arch)
+ .StartsWith("aarch64", ARM::ISAKind::AARCH64)
+ .StartsWith("arm64", ARM::ISAKind::AARCH64)
+ .StartsWith("thumb", ARM::ISAKind::THUMB)
+ .StartsWith("arm", ARM::ISAKind::ARM)
+ .Default(ARM::ISAKind::INVALID);
}
// Little/Big endian
-unsigned llvm::ARM::parseArchEndian(StringRef Arch) {
+ARM::EndianKind ARM::parseArchEndian(StringRef Arch) {
if (Arch.startswith("armeb") || Arch.startswith("thumbeb") ||
Arch.startswith("aarch64_be"))
- return ARM::EK_BIG;
+ return ARM::EndianKind::BIG;
if (Arch.startswith("arm") || Arch.startswith("thumb")) {
if (Arch.endswith("eb"))
- return ARM::EK_BIG;
+ return ARM::EndianKind::BIG;
else
- return ARM::EK_LITTLE;
+ return ARM::EndianKind::LITTLE;
}
if (Arch.startswith("aarch64"))
- return ARM::EK_LITTLE;
+ return ARM::EndianKind::LITTLE;
- return ARM::EK_INVALID;
+ return ARM::EndianKind::INVALID;
}
// Profile A/R/M
-unsigned llvm::ARM::parseArchProfile(StringRef Arch) {
+ARM::ProfileKind ARM::parseArchProfile(StringRef Arch) {
Arch = getCanonicalArchName(Arch);
switch (parseArch(Arch)) {
- case ARM::AK_ARMV6M:
- case ARM::AK_ARMV7M:
- case ARM::AK_ARMV7EM:
- case ARM::AK_ARMV8MMainline:
- case ARM::AK_ARMV8MBaseline:
- return ARM::PK_M;
- case ARM::AK_ARMV7R:
- case ARM::AK_ARMV8R:
- return ARM::PK_R;
- case ARM::AK_ARMV7A:
- case ARM::AK_ARMV7VE:
- case ARM::AK_ARMV7K:
- case ARM::AK_ARMV8A:
- case ARM::AK_ARMV8_1A:
- case ARM::AK_ARMV8_2A:
- return ARM::PK_A;
+ case ARM::ArchKind::ARMV6M:
+ case ARM::ArchKind::ARMV7M:
+ case ARM::ArchKind::ARMV7EM:
+ case ARM::ArchKind::ARMV8MMainline:
+ case ARM::ArchKind::ARMV8MBaseline:
+ return ARM::ProfileKind::M;
+ case ARM::ArchKind::ARMV7R:
+ case ARM::ArchKind::ARMV8R:
+ return ARM::ProfileKind::R;
+ case ARM::ArchKind::ARMV7A:
+ case ARM::ArchKind::ARMV7VE:
+ case ARM::ArchKind::ARMV7K:
+ case ARM::ArchKind::ARMV8A:
+ case ARM::ArchKind::ARMV8_1A:
+ case ARM::ArchKind::ARMV8_2A:
+ return ARM::ProfileKind::A;
+ LLVM_FALLTHROUGH;
+ case ARM::ArchKind::ARMV2:
+ case ARM::ArchKind::ARMV2A:
+ case ARM::ArchKind::ARMV3:
+ case ARM::ArchKind::ARMV3M:
+ case ARM::ArchKind::ARMV4:
+ case ARM::ArchKind::ARMV4T:
+ case ARM::ArchKind::ARMV5T:
+ case ARM::ArchKind::ARMV5TE:
+ case ARM::ArchKind::ARMV5TEJ:
+ case ARM::ArchKind::ARMV6:
+ case ARM::ArchKind::ARMV6K:
+ case ARM::ArchKind::ARMV6T2:
+ case ARM::ArchKind::ARMV6KZ:
+ case ARM::ArchKind::ARMV7S:
+ case ARM::ArchKind::IWMMXT:
+ case ARM::ArchKind::IWMMXT2:
+ case ARM::ArchKind::XSCALE:
+ case ARM::ArchKind::INVALID:
+ return ARM::ProfileKind::INVALID;
}
- return ARM::PK_INVALID;
+ llvm_unreachable("Unhandled architecture");
}
// Version number (ex. v7 = 7).
unsigned llvm::ARM::parseArchVersion(StringRef Arch) {
Arch = getCanonicalArchName(Arch);
switch (parseArch(Arch)) {
- case ARM::AK_ARMV2:
- case ARM::AK_ARMV2A:
+ case ARM::ArchKind::ARMV2:
+ case ARM::ArchKind::ARMV2A:
return 2;
- case ARM::AK_ARMV3:
- case ARM::AK_ARMV3M:
+ case ARM::ArchKind::ARMV3:
+ case ARM::ArchKind::ARMV3M:
return 3;
- case ARM::AK_ARMV4:
- case ARM::AK_ARMV4T:
+ case ARM::ArchKind::ARMV4:
+ case ARM::ArchKind::ARMV4T:
return 4;
- case ARM::AK_ARMV5T:
- case ARM::AK_ARMV5TE:
- case ARM::AK_IWMMXT:
- case ARM::AK_IWMMXT2:
- case ARM::AK_XSCALE:
- case ARM::AK_ARMV5TEJ:
+ case ARM::ArchKind::ARMV5T:
+ case ARM::ArchKind::ARMV5TE:
+ case ARM::ArchKind::IWMMXT:
+ case ARM::ArchKind::IWMMXT2:
+ case ARM::ArchKind::XSCALE:
+ case ARM::ArchKind::ARMV5TEJ:
return 5;
- case ARM::AK_ARMV6:
- case ARM::AK_ARMV6K:
- case ARM::AK_ARMV6T2:
- case ARM::AK_ARMV6KZ:
- case ARM::AK_ARMV6M:
+ case ARM::ArchKind::ARMV6:
+ case ARM::ArchKind::ARMV6K:
+ case ARM::ArchKind::ARMV6T2:
+ case ARM::ArchKind::ARMV6KZ:
+ case ARM::ArchKind::ARMV6M:
return 6;
- case ARM::AK_ARMV7A:
- case ARM::AK_ARMV7VE:
- case ARM::AK_ARMV7R:
- case ARM::AK_ARMV7M:
- case ARM::AK_ARMV7S:
- case ARM::AK_ARMV7EM:
- case ARM::AK_ARMV7K:
+ case ARM::ArchKind::ARMV7A:
+ case ARM::ArchKind::ARMV7VE:
+ case ARM::ArchKind::ARMV7R:
+ case ARM::ArchKind::ARMV7M:
+ case ARM::ArchKind::ARMV7S:
+ case ARM::ArchKind::ARMV7EM:
+ case ARM::ArchKind::ARMV7K:
return 7;
- case ARM::AK_ARMV8A:
- case ARM::AK_ARMV8_1A:
- case ARM::AK_ARMV8_2A:
- case ARM::AK_ARMV8R:
- case ARM::AK_ARMV8MBaseline:
- case ARM::AK_ARMV8MMainline:
+ case ARM::ArchKind::ARMV8A:
+ case ARM::ArchKind::ARMV8_1A:
+ case ARM::ArchKind::ARMV8_2A:
+ case ARM::ArchKind::ARMV8R:
+ case ARM::ArchKind::ARMV8MBaseline:
+ case ARM::ArchKind::ARMV8MMainline:
return 8;
+ case ARM::ArchKind::INVALID:
+ return 0;
}
- return 0;
+ llvm_unreachable("Unhandled architecture");
}
StringRef llvm::ARM::computeDefaultTargetABI(const Triple &TT, StringRef CPU) {
if (TT.isOSBinFormatMachO()) {
if (TT.getEnvironment() == Triple::EABI ||
TT.getOS() == Triple::UnknownOS ||
- llvm::ARM::parseArchProfile(ArchName) == ARM::PK_M)
+ llvm::ARM::parseArchProfile(ArchName) == ARM::ProfileKind::M)
return "aapcs";
if (TT.isWatchABI())
return "aapcs16";
}
// Allows partial match, ex. "v8a" matches "armv8a".
-unsigned llvm::AArch64::parseArch(StringRef Arch) {
+AArch64::ArchKind AArch64::parseArch(StringRef Arch) {
Arch = getCanonicalArchName(Arch);
if (checkArchVersion(Arch) < 8)
- return static_cast<unsigned>(AArch64::ArchKind::AK_INVALID);
+ return ArchKind::INVALID;
StringRef Syn = getArchSynonym(Arch);
for (const auto A : AArch64ARCHNames) {
if (A.getName().endswith(Syn))
- return static_cast<unsigned>(A.ID);
+ return A.ID;
}
- return static_cast<unsigned>(AArch64::ArchKind::AK_INVALID);
+ return ArchKind::INVALID;
}
unsigned llvm::AArch64::parseArchExt(StringRef ArchExt) {
return AArch64::AEK_INVALID;
}
-unsigned llvm::AArch64::parseCPUArch(StringRef CPU) {
+AArch64::ArchKind llvm::AArch64::parseCPUArch(StringRef CPU) {
for (const auto C : AArch64CPUNames) {
if (CPU == C.getName())
- return static_cast<unsigned>(C.ArchID);
+ return C.ArchID;
}
- return static_cast<unsigned>(AArch64::ArchKind::AK_INVALID);
+ return ArchKind::INVALID;
}
// ARM, Thumb, AArch64
-unsigned llvm::AArch64::parseArchISA(StringRef Arch) {
+ARM::ISAKind AArch64::parseArchISA(StringRef Arch) {
return ARM::parseArchISA(Arch);
}
// Little/Big endian
-unsigned llvm::AArch64::parseArchEndian(StringRef Arch) {
+ARM::EndianKind AArch64::parseArchEndian(StringRef Arch) {
return ARM::parseArchEndian(Arch);
}
// Profile A/R/M
-unsigned llvm::AArch64::parseArchProfile(StringRef Arch) {
+ARM::ProfileKind AArch64::parseArchProfile(StringRef Arch) {
return ARM::parseArchProfile(Arch);
}
}
static Triple::ArchType parseARMArch(StringRef ArchName) {
- unsigned ISA = ARM::parseArchISA(ArchName);
- unsigned ENDIAN = ARM::parseArchEndian(ArchName);
+ ARM::ISAKind ISA = ARM::parseArchISA(ArchName);
+ ARM::EndianKind ENDIAN = ARM::parseArchEndian(ArchName);
Triple::ArchType arch = Triple::UnknownArch;
switch (ENDIAN) {
- case ARM::EK_LITTLE: {
+ case ARM::EndianKind::LITTLE: {
switch (ISA) {
- case ARM::IK_ARM:
+ case ARM::ISAKind::ARM:
arch = Triple::arm;
break;
- case ARM::IK_THUMB:
+ case ARM::ISAKind::THUMB:
arch = Triple::thumb;
break;
- case ARM::IK_AARCH64:
+ case ARM::ISAKind::AARCH64:
arch = Triple::aarch64;
break;
+ case ARM::ISAKind::INVALID:
+ break;
}
break;
}
- case ARM::EK_BIG: {
+ case ARM::EndianKind::BIG: {
switch (ISA) {
- case ARM::IK_ARM:
+ case ARM::ISAKind::ARM:
arch = Triple::armeb;
break;
- case ARM::IK_THUMB:
+ case ARM::ISAKind::THUMB:
arch = Triple::thumbeb;
break;
- case ARM::IK_AARCH64:
+ case ARM::ISAKind::AARCH64:
arch = Triple::aarch64_be;
break;
+ case ARM::ISAKind::INVALID:
+ break;
}
break;
}
+ case ARM::EndianKind::INVALID: {
+ break;
+ }
}
ArchName = ARM::getCanonicalArchName(ArchName);
return Triple::UnknownArch;
// Thumb only exists in v4+
- if (ISA == ARM::IK_THUMB &&
+ if (ISA == ARM::ISAKind::THUMB &&
(ArchName.startswith("v2") || ArchName.startswith("v3")))
return Triple::UnknownArch;
// Thumb only for v6m
- unsigned Profile = ARM::parseArchProfile(ArchName);
+ ARM::ProfileKind Profile = ARM::parseArchProfile(ArchName);
unsigned Version = ARM::parseArchVersion(ArchName);
- if (Profile == ARM::PK_M && Version == 6) {
- if (ENDIAN == ARM::EK_BIG)
+ if (Profile == ARM::ProfileKind::M && Version == 6) {
+ if (ENDIAN == ARM::EndianKind::BIG)
return Triple::thumbeb;
else
return Triple::thumb;
// ARM sub arch.
switch(ARM::parseArch(ARMSubArch)) {
- case ARM::AK_ARMV4:
+ case ARM::ArchKind::ARMV4:
return Triple::NoSubArch;
- case ARM::AK_ARMV4T:
+ case ARM::ArchKind::ARMV4T:
return Triple::ARMSubArch_v4t;
- case ARM::AK_ARMV5T:
+ case ARM::ArchKind::ARMV5T:
return Triple::ARMSubArch_v5;
- case ARM::AK_ARMV5TE:
- case ARM::AK_IWMMXT:
- case ARM::AK_IWMMXT2:
- case ARM::AK_XSCALE:
- case ARM::AK_ARMV5TEJ:
+ case ARM::ArchKind::ARMV5TE:
+ case ARM::ArchKind::IWMMXT:
+ case ARM::ArchKind::IWMMXT2:
+ case ARM::ArchKind::XSCALE:
+ case ARM::ArchKind::ARMV5TEJ:
return Triple::ARMSubArch_v5te;
- case ARM::AK_ARMV6:
+ case ARM::ArchKind::ARMV6:
return Triple::ARMSubArch_v6;
- case ARM::AK_ARMV6K:
- case ARM::AK_ARMV6KZ:
+ case ARM::ArchKind::ARMV6K:
+ case ARM::ArchKind::ARMV6KZ:
return Triple::ARMSubArch_v6k;
- case ARM::AK_ARMV6T2:
+ case ARM::ArchKind::ARMV6T2:
return Triple::ARMSubArch_v6t2;
- case ARM::AK_ARMV6M:
+ case ARM::ArchKind::ARMV6M:
return Triple::ARMSubArch_v6m;
- case ARM::AK_ARMV7A:
- case ARM::AK_ARMV7R:
+ case ARM::ArchKind::ARMV7A:
+ case ARM::ArchKind::ARMV7R:
return Triple::ARMSubArch_v7;
- case ARM::AK_ARMV7VE:
+ case ARM::ArchKind::ARMV7VE:
return Triple::ARMSubArch_v7ve;
- case ARM::AK_ARMV7K:
+ case ARM::ArchKind::ARMV7K:
return Triple::ARMSubArch_v7k;
- case ARM::AK_ARMV7M:
+ case ARM::ArchKind::ARMV7M:
return Triple::ARMSubArch_v7m;
- case ARM::AK_ARMV7S:
+ case ARM::ArchKind::ARMV7S:
return Triple::ARMSubArch_v7s;
- case ARM::AK_ARMV7EM:
+ case ARM::ArchKind::ARMV7EM:
return Triple::ARMSubArch_v7em;
- case ARM::AK_ARMV8A:
+ case ARM::ArchKind::ARMV8A:
return Triple::ARMSubArch_v8;
- case ARM::AK_ARMV8_1A:
+ case ARM::ArchKind::ARMV8_1A:
return Triple::ARMSubArch_v8_1a;
- case ARM::AK_ARMV8_2A:
+ case ARM::ArchKind::ARMV8_2A:
return Triple::ARMSubArch_v8_2a;
- case ARM::AK_ARMV8R:
+ case ARM::ArchKind::ARMV8R:
return Triple::ARMSubArch_v8r;
- case ARM::AK_ARMV8MBaseline:
+ case ARM::ArchKind::ARMV8MBaseline:
return Triple::ARMSubArch_v8m_baseline;
- case ARM::AK_ARMV8MMainline:
+ case ARM::ArchKind::ARMV8MMainline:
return Triple::ARMSubArch_v8m_mainline;
default:
return Triple::NoSubArch;
return StringRef();
StringRef CPU = ARM::getDefaultCPU(MArch);
- if (!CPU.empty())
+ if (!CPU.empty() && !CPU.equals("invalid"))
return CPU;
// If no specific architecture version is requested, return the minimum CPU
std::tie(Arch, ExtensionString) =
getParser().parseStringToEndOfStatement().trim().split('+');
- unsigned ID = AArch64::parseArch(Arch);
- if (ID == static_cast<unsigned>(AArch64::ArchKind::AK_INVALID))
+ AArch64::ArchKind ID = AArch64::parseArch(Arch);
+ if (ID == AArch64::ArchKind::INVALID)
return Error(ArchLoc, "unknown arch name");
if (parseToken(AsmToken::EndOfStatement))
if (isTargetDarwin()) {
StringRef ArchName = TargetTriple.getArchName();
- unsigned ArchKind = ARM::parseArch(ArchName);
- if (ArchKind == ARM::AK_ARMV7S)
+ ARM::ArchKind AK = ARM::parseArch(ArchName);
+ if (AK == ARM::ArchKind::ARMV7S)
// Default to the Swift CPU when targeting armv7s/thumbv7s.
CPUString = "swift";
- else if (ArchKind == ARM::AK_ARMV7K)
+ else if (AK == ARM::ArchKind::ARMV7K)
// Default to the Cortex-a7 CPU when targeting armv7k/thumbv7k.
// ARMv7k does not use SjLj exception handling.
CPUString = "cortex-a7";
/// ::= .arch token
bool ARMAsmParser::parseDirectiveArch(SMLoc L) {
StringRef Arch = getParser().parseStringToEndOfStatement().trim();
- unsigned ID = ARM::parseArch(Arch);
+ ARM::ArchKind ID = ARM::parseArch(Arch);
- if (ID == ARM::AK_INVALID)
+ if (ID == ARM::ArchKind::INVALID)
return Error(L, "Unknown arch name");
bool WasThumb = isThumb();
SMLoc ArchLoc = Parser.getTok().getLoc();
Lex();
- unsigned ID = ARM::parseArch(Arch);
+ ARM::ArchKind ID = ARM::parseArch(Arch);
- if (ID == ARM::AK_INVALID)
+ if (ID == ARM::ArchKind::INVALID)
return Error(ArchLoc, "unknown architecture '" + Arch + "'");
if (parseToken(AsmToken::EndOfStatement))
return true;
}
static MachO::CPUSubTypeARM getMachOSubTypeFromArch(StringRef Arch) {
- unsigned AK = ARM::parseArch(Arch);
+ ARM::ArchKind AK = ARM::parseArch(Arch);
switch (AK) {
default:
return MachO::CPU_SUBTYPE_ARM_V7;
- case ARM::AK_ARMV4T:
+ case ARM::ArchKind::ARMV4T:
return MachO::CPU_SUBTYPE_ARM_V4T;
- case ARM::AK_ARMV5T:
- case ARM::AK_ARMV5TE:
- case ARM::AK_ARMV5TEJ:
+ case ARM::ArchKind::ARMV5T:
+ case ARM::ArchKind::ARMV5TE:
+ case ARM::ArchKind::ARMV5TEJ:
return MachO::CPU_SUBTYPE_ARM_V5;
- case ARM::AK_ARMV6:
- case ARM::AK_ARMV6K:
+ case ARM::ArchKind::ARMV6:
+ case ARM::ArchKind::ARMV6K:
return MachO::CPU_SUBTYPE_ARM_V6;
- case ARM::AK_ARMV7A:
+ case ARM::ArchKind::ARMV7A:
return MachO::CPU_SUBTYPE_ARM_V7;
- case ARM::AK_ARMV7S:
+ case ARM::ArchKind::ARMV7S:
return MachO::CPU_SUBTYPE_ARM_V7S;
- case ARM::AK_ARMV7K:
+ case ARM::ArchKind::ARMV7K:
return MachO::CPU_SUBTYPE_ARM_V7K;
- case ARM::AK_ARMV6M:
+ case ARM::ArchKind::ARMV6M:
return MachO::CPU_SUBTYPE_ARM_V6M;
- case ARM::AK_ARMV7M:
+ case ARM::ArchKind::ARMV7M:
return MachO::CPU_SUBTYPE_ARM_V7M;
- case ARM::AK_ARMV7EM:
+ case ARM::ArchKind::ARMV7EM:
return MachO::CPU_SUBTYPE_ARM_V7EM;
}
}
void emitTextAttribute(unsigned Attribute, StringRef String) override;
void emitIntTextAttribute(unsigned Attribute, unsigned IntValue,
StringRef StringValue) override;
- void emitArch(unsigned Arch) override;
+ void emitArch(ARM::ArchKind Arch) override;
void emitArchExtension(unsigned ArchExt) override;
- void emitObjectArch(unsigned Arch) override;
+ void emitObjectArch(ARM::ArchKind Arch) override;
void emitFPU(unsigned FPU) override;
void emitInst(uint32_t Inst, char Suffix = '\0') override;
void finishAttributeSection() override;
OS << "\n";
}
-void ARMTargetAsmStreamer::emitArch(unsigned Arch) {
+void ARMTargetAsmStreamer::emitArch(ARM::ArchKind Arch) {
OS << "\t.arch\t" << ARM::getArchName(Arch) << "\n";
}
OS << "\t.arch_extension\t" << ARM::getArchExtName(ArchExt) << "\n";
}
-void ARMTargetAsmStreamer::emitObjectArch(unsigned Arch) {
+void ARMTargetAsmStreamer::emitObjectArch(ARM::ArchKind Arch) {
OS << "\t.object_arch\t" << ARM::getArchName(Arch) << '\n';
}
StringRef CurrentVendor;
unsigned FPU = ARM::FK_INVALID;
- unsigned Arch = ARM::AK_INVALID;
- unsigned EmittedArch = ARM::AK_INVALID;
+ ARM::ArchKind Arch = ARM::ArchKind::INVALID;
+ ARM::ArchKind EmittedArch = ARM::ArchKind::INVALID;
SmallVector<AttributeItem, 64> Contents;
MCSection *AttributeSection = nullptr;
void emitTextAttribute(unsigned Attribute, StringRef String) override;
void emitIntTextAttribute(unsigned Attribute, unsigned IntValue,
StringRef StringValue) override;
- void emitArch(unsigned Arch) override;
- void emitObjectArch(unsigned Arch) override;
+ void emitArch(ARM::ArchKind Arch) override;
+ void emitObjectArch(ARM::ArchKind Arch) override;
void emitFPU(unsigned FPU) override;
void emitInst(uint32_t Inst, char Suffix = '\0') override;
void finishAttributeSection() override;
/* OverwriteExisting= */ true);
}
-void ARMTargetELFStreamer::emitArch(unsigned Value) {
+void ARMTargetELFStreamer::emitArch(ARM::ArchKind Value) {
Arch = Value;
}
-void ARMTargetELFStreamer::emitObjectArch(unsigned Value) {
+void ARMTargetELFStreamer::emitObjectArch(ARM::ArchKind Value) {
EmittedArch = Value;
}
ARM::getCPUAttr(Arch),
false);
- if (EmittedArch == ARM::AK_INVALID)
+ if (EmittedArch == ARM::ArchKind::INVALID)
setAttributeItem(CPU_arch,
ARM::getArchAttr(Arch),
false);
false);
switch (Arch) {
- case ARM::AK_ARMV2:
- case ARM::AK_ARMV2A:
- case ARM::AK_ARMV3:
- case ARM::AK_ARMV3M:
- case ARM::AK_ARMV4:
+ case ARM::ArchKind::ARMV2:
+ case ARM::ArchKind::ARMV2A:
+ case ARM::ArchKind::ARMV3:
+ case ARM::ArchKind::ARMV3M:
+ case ARM::ArchKind::ARMV4:
setAttributeItem(ARM_ISA_use, Allowed, false);
break;
- case ARM::AK_ARMV4T:
- case ARM::AK_ARMV5T:
- case ARM::AK_ARMV5TE:
- case ARM::AK_ARMV6:
+ case ARM::ArchKind::ARMV4T:
+ case ARM::ArchKind::ARMV5T:
+ case ARM::ArchKind::ARMV5TE:
+ case ARM::ArchKind::ARMV6:
setAttributeItem(ARM_ISA_use, Allowed, false);
setAttributeItem(THUMB_ISA_use, Allowed, false);
break;
- case ARM::AK_ARMV6T2:
+ case ARM::ArchKind::ARMV6T2:
setAttributeItem(ARM_ISA_use, Allowed, false);
setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
break;
- case ARM::AK_ARMV6K:
- case ARM::AK_ARMV6KZ:
+ case ARM::ArchKind::ARMV6K:
+ case ARM::ArchKind::ARMV6KZ:
setAttributeItem(ARM_ISA_use, Allowed, false);
setAttributeItem(THUMB_ISA_use, Allowed, false);
setAttributeItem(Virtualization_use, AllowTZ, false);
break;
- case ARM::AK_ARMV6M:
+ case ARM::ArchKind::ARMV6M:
setAttributeItem(THUMB_ISA_use, Allowed, false);
break;
- case ARM::AK_ARMV7A:
+ case ARM::ArchKind::ARMV7A:
setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
setAttributeItem(ARM_ISA_use, Allowed, false);
setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
break;
- case ARM::AK_ARMV7R:
+ case ARM::ArchKind::ARMV7R:
setAttributeItem(CPU_arch_profile, RealTimeProfile, false);
setAttributeItem(ARM_ISA_use, Allowed, false);
setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
break;
- case ARM::AK_ARMV7M:
+ case ARM::ArchKind::ARMV7M:
setAttributeItem(CPU_arch_profile, MicroControllerProfile, false);
setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
break;
- case ARM::AK_ARMV8A:
- case ARM::AK_ARMV8_1A:
- case ARM::AK_ARMV8_2A:
+ case ARM::ArchKind::ARMV8A:
+ case ARM::ArchKind::ARMV8_1A:
+ case ARM::ArchKind::ARMV8_2A:
setAttributeItem(CPU_arch_profile, ApplicationProfile, false);
setAttributeItem(ARM_ISA_use, Allowed, false);
setAttributeItem(THUMB_ISA_use, AllowThumb32, false);
setAttributeItem(Virtualization_use, AllowTZVirtualization, false);
break;
- case ARM::AK_ARMV8MBaseline:
- case ARM::AK_ARMV8MMainline:
+ case ARM::ArchKind::ARMV8MBaseline:
+ case ARM::ArchKind::ARMV8MMainline:
setAttributeItem(THUMB_ISA_use, AllowThumbDerived, false);
setAttributeItem(CPU_arch_profile, MicroControllerProfile, false);
break;
- case ARM::AK_IWMMXT:
+ case ARM::ArchKind::IWMMXT:
setAttributeItem(ARM_ISA_use, Allowed, false);
setAttributeItem(THUMB_ISA_use, Allowed, false);
setAttributeItem(WMMX_arch, AllowWMMXv1, false);
break;
- case ARM::AK_IWMMXT2:
+ case ARM::ArchKind::IWMMXT2:
setAttributeItem(ARM_ISA_use, Allowed, false);
setAttributeItem(THUMB_ISA_use, Allowed, false);
setAttributeItem(WMMX_arch, AllowWMMXv2, false);
break;
default:
- report_fatal_error("Unknown Arch: " + Twine(Arch));
+ report_fatal_error("Unknown Arch: " + Twine(ARM::getArchName(Arch)));
break;
}
}
if (FPU != ARM::FK_INVALID)
emitFPUDefaultAttributes();
- if (Arch != ARM::AK_INVALID)
+ if (Arch != ARM::ArchKind::INVALID)
emitArchDefaultAttributes();
if (Contents.empty())
std::string ARMArchFeature;
- unsigned ArchID = ARM::parseArch(TT.getArchName());
- if (ArchID != ARM::AK_INVALID && (CPU.empty() || CPU == "generic"))
+ ARM::ArchKind ArchID = ARM::parseArch(TT.getArchName());
+ if (ArchID != ARM::ArchKind::INVALID && (CPU.empty() || CPU == "generic"))
ARMArchFeature = (ARMArchFeature + "+" + ARM::getArchName(ArchID)).str();
if (isThumb) {
void ARMTargetStreamer::emitIntTextAttribute(unsigned Attribute,
unsigned IntValue,
StringRef StringValue) {}
-void ARMTargetStreamer::emitArch(unsigned Arch) {}
+void ARMTargetStreamer::emitArch(ARM::ArchKind Arch) {}
void ARMTargetStreamer::emitArchExtension(unsigned ArchExt) {}
-void ARMTargetStreamer::emitObjectArch(unsigned Arch) {}
+void ARMTargetStreamer::emitObjectArch(ARM::ArchKind Arch) {}
void ARMTargetStreamer::emitFPU(unsigned FPU) {}
void ARMTargetStreamer::finishAttributeSection() {}
void ARMTargetStreamer::emitInst(uint32_t Inst, char Suffix) {}
bool testARMCPU(StringRef CPUName, StringRef ExpectedArch,
StringRef ExpectedFPU, unsigned ExpectedFlags,
StringRef CPUAttr) {
- unsigned ArchKind = ARM::parseCPUArch(CPUName);
- bool pass = ARM::getArchName(ArchKind).equals(ExpectedArch);
- unsigned FPUKind = ARM::getDefaultFPU(CPUName, ArchKind);
+ ARM::ArchKind AK = ARM::parseCPUArch(CPUName);
+ bool pass = ARM::getArchName(AK).equals(ExpectedArch);
+ unsigned FPUKind = ARM::getDefaultFPU(CPUName, AK);
pass &= ARM::getFPUName(FPUKind).equals(ExpectedFPU);
- unsigned ExtKind = ARM::getDefaultExtensions(CPUName, ArchKind);
+ unsigned ExtKind = ARM::getDefaultExtensions(CPUName, AK);
if (ExtKind > 1 && (ExtKind & ARM::AEK_NONE))
pass &= ((ExtKind ^ ARM::AEK_NONE) == ExpectedFlags);
else
pass &= (ExtKind == ExpectedFlags);
- pass &= ARM::getCPUAttr(ArchKind).equals(CPUAttr);
+ pass &= ARM::getCPUAttr(AK).equals(CPUAttr);
return pass;
}
bool testARMArch(StringRef Arch, StringRef DefaultCPU, StringRef SubArch,
unsigned ArchAttr) {
- unsigned ArchKind = ARM::parseArch(Arch);
- return (ArchKind != ARM::AK_INVALID) &
+ ARM::ArchKind AK = ARM::parseArch(Arch);
+ return (AK!= ARM::ArchKind::INVALID) &
ARM::getDefaultCPU(Arch).equals(DefaultCPU) &
- ARM::getSubArch(ArchKind).equals(SubArch) &
- (ARM::getArchAttr(ArchKind) == ArchAttr);
+ ARM::getSubArch(AK).equals(SubArch) &
+ (ARM::getArchAttr(AK) == ArchAttr);
}
TEST(TargetParserTest, testARMArch) {
ARMBuildAttrs::CPUArch::v7));
}
-bool testARMExtension(StringRef CPUName, unsigned ArchKind, StringRef ArchExt) {
+bool testARMExtension(StringRef CPUName,ARM::ArchKind ArchKind, StringRef ArchExt) {
return ARM::getDefaultExtensions(CPUName, ArchKind) &
ARM::parseArchExt(ArchExt);
}
TEST(TargetParserTest, testARMExtension) {
- EXPECT_FALSE(testARMExtension("arm2", 0, "thumb"));
- EXPECT_FALSE(testARMExtension("arm3", 0, "thumb"));
- EXPECT_FALSE(testARMExtension("arm6", 0, "thumb"));
- EXPECT_FALSE(testARMExtension("arm7m", 0, "thumb"));
- EXPECT_FALSE(testARMExtension("strongarm", 0, "dsp"));
- EXPECT_FALSE(testARMExtension("arm7tdmi", 0, "dsp"));
- EXPECT_FALSE(testARMExtension("arm10tdmi", 0, "simd"));
- EXPECT_FALSE(testARMExtension("arm1022e", 0, "simd"));
- EXPECT_FALSE(testARMExtension("arm926ej-s", 0, "simd"));
- EXPECT_FALSE(testARMExtension("arm1136jf-s", 0, "crypto"));
- EXPECT_FALSE(testARMExtension("arm1176j-s", 0, "crypto"));
- EXPECT_FALSE(testARMExtension("arm1156t2-s", 0, "crypto"));
- EXPECT_FALSE(testARMExtension("arm1176jzf-s", 0, "crypto"));
- EXPECT_FALSE(testARMExtension("cortex-m0", 0, "crypto"));
- EXPECT_FALSE(testARMExtension("cortex-a8", 0, "crypto"));
- EXPECT_FALSE(testARMExtension("cortex-r4", 0, "crypto"));
- EXPECT_FALSE(testARMExtension("cortex-m3", 0, "crypto"));
- EXPECT_FALSE(testARMExtension("cortex-a53", 0, "ras"));
- EXPECT_FALSE(testARMExtension("cortex-r52", 0, "ras"));
- EXPECT_FALSE(testARMExtension("iwmmxt", 0, "crc"));
- EXPECT_FALSE(testARMExtension("xscale", 0, "crc"));
- EXPECT_FALSE(testARMExtension("swift", 0, "crc"));
-
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV2, "thumb"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV2A, "thumb"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV3, "thumb"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV3M, "thumb"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV4, "dsp"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV4T, "dsp"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV5T, "simd"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV5TE, "simd"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV5TEJ, "simd"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV6, "crypto"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV6K, "crypto"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV6T2, "crypto"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV6KZ, "crypto"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV6M, "crypto"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV7A, "crypto"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV7R, "crypto"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV7M, "crypto"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV7EM, "crypto"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV8A, "ras"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV8_1A, "ras"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV8_2A, "spe"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV8R, "ras"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV8MBaseline, "crc"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV8MMainline, "crc"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_IWMMXT, "crc"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_IWMMXT2, "crc"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_XSCALE, "crc"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV7S, "crypto"));
- EXPECT_FALSE(testARMExtension("generic", ARM::AK_ARMV7K, "crypto"));
+ EXPECT_FALSE(testARMExtension("arm2", ARM::ArchKind::INVALID, "thumb"));
+ EXPECT_FALSE(testARMExtension("arm3", ARM::ArchKind::INVALID, "thumb"));
+ EXPECT_FALSE(testARMExtension("arm6", ARM::ArchKind::INVALID, "thumb"));
+ EXPECT_FALSE(testARMExtension("arm7m", ARM::ArchKind::INVALID, "thumb"));
+ EXPECT_FALSE(testARMExtension("strongarm", ARM::ArchKind::INVALID, "dsp"));
+ EXPECT_FALSE(testARMExtension("arm7tdmi", ARM::ArchKind::INVALID, "dsp"));
+ EXPECT_FALSE(testARMExtension("arm10tdmi",
+ ARM::ArchKind::INVALID, "simd"));
+ EXPECT_FALSE(testARMExtension("arm1022e", ARM::ArchKind::INVALID, "simd"));
+ EXPECT_FALSE(testARMExtension("arm926ej-s",
+ ARM::ArchKind::INVALID, "simd"));
+ EXPECT_FALSE(testARMExtension("arm1136jf-s",
+ ARM::ArchKind::INVALID, "crypto"));
+ EXPECT_FALSE(testARMExtension("arm1176j-s",
+ ARM::ArchKind::INVALID, "crypto"));
+ EXPECT_FALSE(testARMExtension("arm1156t2-s",
+ ARM::ArchKind::INVALID, "crypto"));
+ EXPECT_FALSE(testARMExtension("arm1176jzf-s",
+ ARM::ArchKind::INVALID, "crypto"));
+ EXPECT_FALSE(testARMExtension("cortex-m0",
+ ARM::ArchKind::INVALID, "crypto"));
+ EXPECT_FALSE(testARMExtension("cortex-a8",
+ ARM::ArchKind::INVALID, "crypto"));
+ EXPECT_FALSE(testARMExtension("cortex-r4",
+ ARM::ArchKind::INVALID, "crypto"));
+ EXPECT_FALSE(testARMExtension("cortex-m3",
+ ARM::ArchKind::INVALID, "crypto"));
+ EXPECT_FALSE(testARMExtension("cortex-a53",
+ ARM::ArchKind::INVALID, "ras"));
+ EXPECT_FALSE(testARMExtension("cortex-r52",
+ ARM::ArchKind::INVALID, "ras"));
+ EXPECT_FALSE(testARMExtension("iwmmxt", ARM::ArchKind::INVALID, "crc"));
+ EXPECT_FALSE(testARMExtension("xscale", ARM::ArchKind::INVALID, "crc"));
+ EXPECT_FALSE(testARMExtension("swift", ARM::ArchKind::INVALID, "crc"));
+
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV2, "thumb"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV2A, "thumb"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV3, "thumb"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV3M, "thumb"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV4, "dsp"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV4T, "dsp"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV5T, "simd"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV5TE, "simd"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV5TEJ, "simd"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV6, "crypto"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV6K, "crypto"));
+ EXPECT_FALSE(testARMExtension("generic",
+ ARM::ArchKind::ARMV6T2, "crypto"));
+ EXPECT_FALSE(testARMExtension("generic",
+ ARM::ArchKind::ARMV6KZ, "crypto"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV6M, "crypto"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV7A, "crypto"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV7R, "crypto"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV7M, "crypto"));
+ EXPECT_FALSE(testARMExtension("generic",
+ ARM::ArchKind::ARMV7EM, "crypto"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8A, "ras"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8_1A, "ras"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8_2A, "spe"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV8R, "ras"));
+ EXPECT_FALSE(testARMExtension("generic",
+ ARM::ArchKind::ARMV8MBaseline, "crc"));
+ EXPECT_FALSE(testARMExtension("generic",
+ ARM::ArchKind::ARMV8MMainline, "crc"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::IWMMXT, "crc"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::IWMMXT2, "crc"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::XSCALE, "crc"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV7S, "crypto"));
+ EXPECT_FALSE(testARMExtension("generic", ARM::ArchKind::ARMV7K, "crypto"));
}
TEST(TargetParserTest, ARMFPUVersion) {
- for (ARM::FPUKind FK = static_cast<ARM::FPUKind>(0);
+ for (ARM::FPUKind FK = static_cast<ARM::FPUKind>(0);
FK <= ARM::FPUKind::FK_LAST;
FK = static_cast<ARM::FPUKind>(static_cast<unsigned>(FK) + 1))
- if (FK == ARM::FK_LAST)
- EXPECT_EQ(0U, ARM::getFPUVersion(FK));
+ if (FK == ARM::FK_LAST || ARM::getFPUName(FK) == "invalid" ||
+ ARM::getFPUName(FK) == "none" || ARM::getFPUName(FK) == "softvfp")
+ EXPECT_EQ(ARM::FPUVersion::NONE, ARM::getFPUVersion(FK));
else
- EXPECT_LE(0U, ARM::getFPUVersion(FK));
+ EXPECT_NE(ARM::FPUVersion::NONE, ARM::getFPUVersion(FK));
}
TEST(TargetParserTest, ARMFPUNeonSupportLevel) {
for (ARM::FPUKind FK = static_cast<ARM::FPUKind>(0);
FK <= ARM::FPUKind::FK_LAST;
FK = static_cast<ARM::FPUKind>(static_cast<unsigned>(FK) + 1))
- if (FK == ARM::FK_LAST)
- EXPECT_EQ(0U, ARM::getFPUNeonSupportLevel(FK));
+ if (FK == ARM::FK_LAST ||
+ ARM::getFPUName(FK).find("neon") == std::string::npos)
+ EXPECT_EQ(ARM::NeonSupportLevel::None,
+ ARM::getFPUNeonSupportLevel(FK));
else
- EXPECT_LE(0U, ARM::getFPUNeonSupportLevel(FK));
+ EXPECT_NE(ARM::NeonSupportLevel::None,
+ ARM::getFPUNeonSupportLevel(FK));
}
TEST(TargetParserTest, ARMFPURestriction) {
for (ARM::FPUKind FK = static_cast<ARM::FPUKind>(0);
FK <= ARM::FPUKind::FK_LAST;
- FK = static_cast<ARM::FPUKind>(static_cast<unsigned>(FK) + 1))
- if (FK == ARM::FK_LAST)
- EXPECT_EQ(0U, ARM::getFPURestriction(FK));
+ FK = static_cast<ARM::FPUKind>(static_cast<unsigned>(FK) + 1)) {
+ if (FK == ARM::FK_LAST ||
+ (ARM::getFPUName(FK).find("d16") == std::string::npos &&
+ ARM::getFPUName(FK).find("vfpv3xd") == std::string::npos))
+ EXPECT_EQ(ARM::FPURestriction::None, ARM::getFPURestriction(FK));
else
- EXPECT_LE(0U, ARM::getFPURestriction(FK));
+ EXPECT_NE(ARM::FPURestriction::None, ARM::getFPURestriction(FK));
+ }
}
TEST(TargetParserTest, ARMExtensionFeatures) {
std::string thumb_2 = "thumb" + (std::string)(Arch[i]) + "eb";
std::string thumb_3 = "thumb" + (std::string)(Arch[i]);
- EXPECT_EQ(ARM::EK_BIG, ARM::parseArchEndian(arm_1));
- EXPECT_EQ(ARM::EK_BIG, ARM::parseArchEndian(arm_2));
- EXPECT_EQ(ARM::EK_LITTLE, ARM::parseArchEndian(arm_3));
+ EXPECT_EQ(ARM::EndianKind::BIG, ARM::parseArchEndian(arm_1));
+ EXPECT_EQ(ARM::EndianKind::BIG, ARM::parseArchEndian(arm_2));
+ EXPECT_EQ(ARM::EndianKind::LITTLE, ARM::parseArchEndian(arm_3));
- EXPECT_EQ(ARM::IK_ARM, ARM::parseArchISA(arm_1));
- EXPECT_EQ(ARM::IK_ARM, ARM::parseArchISA(arm_2));
- EXPECT_EQ(ARM::IK_ARM, ARM::parseArchISA(arm_3));
+ EXPECT_EQ(ARM::ISAKind::ARM, ARM::parseArchISA(arm_1));
+ EXPECT_EQ(ARM::ISAKind::ARM, ARM::parseArchISA(arm_2));
+ EXPECT_EQ(ARM::ISAKind::ARM, ARM::parseArchISA(arm_3));
if (i >= 4) {
- EXPECT_EQ(ARM::EK_BIG, ARM::parseArchEndian(thumb_1));
- EXPECT_EQ(ARM::EK_BIG, ARM::parseArchEndian(thumb_2));
- EXPECT_EQ(ARM::EK_LITTLE, ARM::parseArchEndian(thumb_3));
+ EXPECT_EQ(ARM::EndianKind::BIG, ARM::parseArchEndian(thumb_1));
+ EXPECT_EQ(ARM::EndianKind::BIG, ARM::parseArchEndian(thumb_2));
+ EXPECT_EQ(ARM::EndianKind::LITTLE, ARM::parseArchEndian(thumb_3));
- EXPECT_EQ(ARM::IK_THUMB, ARM::parseArchISA(thumb_1));
- EXPECT_EQ(ARM::IK_THUMB, ARM::parseArchISA(thumb_2));
- EXPECT_EQ(ARM::IK_THUMB, ARM::parseArchISA(thumb_3));
+ EXPECT_EQ(ARM::ISAKind::THUMB, ARM::parseArchISA(thumb_1));
+ EXPECT_EQ(ARM::ISAKind::THUMB, ARM::parseArchISA(thumb_2));
+ EXPECT_EQ(ARM::ISAKind::THUMB, ARM::parseArchISA(thumb_3));
}
}
- EXPECT_EQ(ARM::EK_LITTLE, ARM::parseArchEndian("aarch64"));
- EXPECT_EQ(ARM::EK_BIG, ARM::parseArchEndian("aarch64_be"));
+ EXPECT_EQ(ARM::EndianKind::LITTLE, ARM::parseArchEndian("aarch64"));
+ EXPECT_EQ(ARM::EndianKind::BIG, ARM::parseArchEndian("aarch64_be"));
- EXPECT_EQ(ARM::IK_AARCH64, ARM::parseArchISA("aarch64"));
- EXPECT_EQ(ARM::IK_AARCH64, ARM::parseArchISA("aarch64_be"));
- EXPECT_EQ(ARM::IK_AARCH64, ARM::parseArchISA("arm64"));
- EXPECT_EQ(ARM::IK_AARCH64, ARM::parseArchISA("arm64_be"));
+ EXPECT_EQ(ARM::ISAKind::AARCH64, ARM::parseArchISA("aarch64"));
+ EXPECT_EQ(ARM::ISAKind::AARCH64, ARM::parseArchISA("aarch64_be"));
+ EXPECT_EQ(ARM::ISAKind::AARCH64, ARM::parseArchISA("arm64"));
+ EXPECT_EQ(ARM::ISAKind::AARCH64, ARM::parseArchISA("arm64_be"));
}
TEST(TargetParserTest, ARMparseArchProfile) {
for (unsigned i = 0; i < array_lengthof(ARMArch); i++) {
switch (ARM::parseArch(ARMArch[i])) {
- case ARM::AK_ARMV6M:
- case ARM::AK_ARMV7M:
- case ARM::AK_ARMV7EM:
- case ARM::AK_ARMV8MMainline:
- case ARM::AK_ARMV8MBaseline:
- EXPECT_EQ(ARM::PK_M, ARM::parseArchProfile(ARMArch[i]));
- continue;
- case ARM::AK_ARMV7R:
- case ARM::AK_ARMV8R:
- EXPECT_EQ(ARM::PK_R, ARM::parseArchProfile(ARMArch[i]));
- continue;
- case ARM::AK_ARMV7A:
- case ARM::AK_ARMV7VE:
- case ARM::AK_ARMV7K:
- case ARM::AK_ARMV8A:
- case ARM::AK_ARMV8_1A:
- case ARM::AK_ARMV8_2A:
- EXPECT_EQ(ARM::PK_A, ARM::parseArchProfile(ARMArch[i]));
- continue;
+ case ARM::ArchKind::ARMV6M:
+ case ARM::ArchKind::ARMV7M:
+ case ARM::ArchKind::ARMV7EM:
+ case ARM::ArchKind::ARMV8MMainline:
+ case ARM::ArchKind::ARMV8MBaseline:
+ EXPECT_EQ(ARM::ProfileKind::M, ARM::parseArchProfile(ARMArch[i]));
+ break;
+ case ARM::ArchKind::ARMV7R:
+ case ARM::ArchKind::ARMV8R:
+ EXPECT_EQ(ARM::ProfileKind::R, ARM::parseArchProfile(ARMArch[i]));
+ break;
+ case ARM::ArchKind::ARMV7A:
+ case ARM::ArchKind::ARMV7VE:
+ case ARM::ArchKind::ARMV7K:
+ case ARM::ArchKind::ARMV8A:
+ case ARM::ArchKind::ARMV8_1A:
+ case ARM::ArchKind::ARMV8_2A:
+ EXPECT_EQ(ARM::ProfileKind::A, ARM::parseArchProfile(ARMArch[i]));
+ break;
+ default:
+ EXPECT_EQ(ARM::ProfileKind::INVALID, ARM::parseArchProfile(ARMArch[i]));
+ break;
}
- EXPECT_EQ(ARM::PK_INVALID, ARM::parseArchProfile(ARMArch[i]));
}
}
bool testAArch64CPU(StringRef CPUName, StringRef ExpectedArch,
StringRef ExpectedFPU, unsigned ExpectedFlags,
StringRef CPUAttr) {
- unsigned ArchKind = AArch64::parseCPUArch(CPUName);
- bool pass = AArch64::getArchName(ArchKind).equals(ExpectedArch);
- unsigned FPUKind = AArch64::getDefaultFPU(CPUName, ArchKind);
+ AArch64::ArchKind AK = AArch64::parseCPUArch(CPUName);
+ bool pass = AArch64::getArchName(AK).equals(ExpectedArch);
+ unsigned FPUKind = AArch64::getDefaultFPU(CPUName, AK);
pass &= AArch64::getFPUName(FPUKind).equals(ExpectedFPU);
- unsigned ExtKind = AArch64::getDefaultExtensions(CPUName, ArchKind);
+ unsigned ExtKind = AArch64::getDefaultExtensions(CPUName, AK);
if (ExtKind > 1 && (ExtKind & AArch64::AEK_NONE))
pass &= ((ExtKind ^ AArch64::AEK_NONE) == ExpectedFlags);
else
pass &= (ExtKind == ExpectedFlags);
- pass &= AArch64::getCPUAttr(ArchKind).equals(CPUAttr);
+ pass &= AArch64::getCPUAttr(AK).equals(CPUAttr);
return pass;
}
bool testAArch64Arch(StringRef Arch, StringRef DefaultCPU, StringRef SubArch,
unsigned ArchAttr) {
- unsigned ArchKind = AArch64::parseArch(Arch);
- return (ArchKind != static_cast<unsigned>(AArch64::ArchKind::AK_INVALID)) &
+ AArch64::ArchKind AK = AArch64::parseArch(Arch);
+ return (AK != AArch64::ArchKind::INVALID) &
AArch64::getDefaultCPU(Arch).equals(DefaultCPU) &
- AArch64::getSubArch(ArchKind).equals(SubArch) &
- (AArch64::getArchAttr(ArchKind) == ArchAttr);
+ AArch64::getSubArch(AK).equals(SubArch) &
+ (AArch64::getArchAttr(AK) == ArchAttr);
}
TEST(TargetParserTest, testAArch64Arch) {
ARMBuildAttrs::CPUArch::v8_A));
}
-bool testAArch64Extension(StringRef CPUName, unsigned ArchKind,
+bool testAArch64Extension(StringRef CPUName, AArch64::ArchKind AK,
StringRef ArchExt) {
- return AArch64::getDefaultExtensions(CPUName, ArchKind) &
+ return AArch64::getDefaultExtensions(CPUName, AK) &
AArch64::parseArchExt(ArchExt);
}
TEST(TargetParserTest, testAArch64Extension) {
- EXPECT_FALSE(testAArch64Extension("cortex-a35", 0, "ras"));
- EXPECT_FALSE(testAArch64Extension("cortex-a53", 0, "ras"));
- EXPECT_FALSE(testAArch64Extension("cortex-a57", 0, "ras"));
- EXPECT_FALSE(testAArch64Extension("cortex-a72", 0, "ras"));
- EXPECT_FALSE(testAArch64Extension("cortex-a73", 0, "ras"));
- EXPECT_FALSE(testAArch64Extension("cyclone", 0, "ras"));
- EXPECT_FALSE(testAArch64Extension("exynos-m1", 0, "ras"));
- EXPECT_FALSE(testAArch64Extension("kryo", 0, "ras"));
- EXPECT_FALSE(testAArch64Extension("thunderx2t99", 0, "ras"));
- EXPECT_FALSE(testAArch64Extension("thunderx", 0, "lse"));
- EXPECT_FALSE(testAArch64Extension("thunderxt81", 0, "lse"));
- EXPECT_FALSE(testAArch64Extension("thunderxt83", 0, "lse"));
- EXPECT_FALSE(testAArch64Extension("thunderxt88", 0, "lse"));
+ EXPECT_FALSE(testAArch64Extension("cortex-a35",
+ AArch64::ArchKind::INVALID, "ras"));
+ EXPECT_FALSE(testAArch64Extension("cortex-a53",
+ AArch64::ArchKind::INVALID, "ras"));
+ EXPECT_FALSE(testAArch64Extension("cortex-a57",
+ AArch64::ArchKind::INVALID, "ras"));
+ EXPECT_FALSE(testAArch64Extension("cortex-a72",
+ AArch64::ArchKind::INVALID, "ras"));
+ EXPECT_FALSE(testAArch64Extension("cortex-a73",
+ AArch64::ArchKind::INVALID, "ras"));
+ EXPECT_FALSE(testAArch64Extension("cyclone",
+ AArch64::ArchKind::INVALID, "ras"));
+ EXPECT_FALSE(testAArch64Extension("exynos-m1",
+ AArch64::ArchKind::INVALID, "ras"));
+ EXPECT_FALSE(testAArch64Extension("kryo",
+ AArch64::ArchKind::INVALID, "ras"));
+ EXPECT_FALSE(testAArch64Extension("thunderx2t99",
+ AArch64::ArchKind::INVALID, "ras"));
+ EXPECT_FALSE(testAArch64Extension("thunderx",
+ AArch64::ArchKind::INVALID, "lse"));
+ EXPECT_FALSE(testAArch64Extension("thunderxt81",
+ AArch64::ArchKind::INVALID, "lse"));
+ EXPECT_FALSE(testAArch64Extension("thunderxt83",
+ AArch64::ArchKind::INVALID, "lse"));
+ EXPECT_FALSE(testAArch64Extension("thunderxt88",
+ AArch64::ArchKind::INVALID, "lse"));
EXPECT_FALSE(testAArch64Extension(
- "generic", static_cast<unsigned>(AArch64::ArchKind::AK_ARMV8A), "ras"));
+ "generic", AArch64::ArchKind::ARMV8A, "ras"));
EXPECT_FALSE(testAArch64Extension(
- "generic", static_cast<unsigned>(AArch64::ArchKind::AK_ARMV8_1A), "ras"));
+ "generic", AArch64::ArchKind::ARMV8_1A, "ras"));
EXPECT_FALSE(testAArch64Extension(
- "generic", static_cast<unsigned>(AArch64::ArchKind::AK_ARMV8_2A), "spe"));
+ "generic", AArch64::ArchKind::ARMV8_2A, "spe"));
}
TEST(TargetParserTest, AArch64ExtensionFeatures) {
TEST(TargetParserTest, AArch64ArchFeatures) {
std::vector<StringRef> Features;
-
- for (unsigned AK = 0; AK < static_cast<unsigned>(AArch64::ArchKind::AK_LAST);
- AK++)
- EXPECT_TRUE((AK == static_cast<unsigned>(AArch64::ArchKind::AK_INVALID) ||
- AK == static_cast<unsigned>(AArch64::ArchKind::AK_LAST))
+ AArch64::ArchKind ArchKinds[] = {
+#define AARCH64_ARCH(NAME, ID, CPU_ATTR, SUB_ARCH, ARCH_ATTR, ARCH_FPU, ARCH_BASE_EXT) \
+ AArch64::ArchKind::ID,
+#include "llvm/Support/AArch64TargetParser.def"
+ };
+
+ for (auto AK : ArchKinds)
+ EXPECT_TRUE((AK == AArch64::ArchKind::INVALID)
? !AArch64::getArchFeatures(AK, Features)
: AArch64::getArchFeatures(AK, Features));
}
projects / llvm / commitdiff