; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE2
; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse3 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE3
+; RUN: llc < %s -mtriple=x86_64-unknown-unknown -mcpu=x86-64 -mattr=+sse4.1 -x86-experimental-vector-shuffle-lowering | FileCheck %s --check-prefix=ALL --check-prefix=SSE41
target datalayout = "e-m:e-i64:64-f80:128-n8:16:32:64-S128"
target triple = "x86_64-unknown-unknown"
; SSE3-LABEL: @shuffle_v2f64_00
; SSE3: unpcklpd {{.*}} # xmm0 = xmm0[0,0]
; SSE3-NEXT: retq
+;
+; SSE41-LABEL: @shuffle_v2f64_00
+; SSE41: unpcklpd {{.*}} # xmm0 = xmm0[0,0]
+; SSE41-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 0, i32 0>
ret <2 x double> %shuffle
}
; SSE3: unpcklpd {{.*}} # xmm1 = xmm1[0,0]
; SSE3-NEXT: movapd %xmm1, %xmm0
; SSE3-NEXT: retq
+;
+; SSE41-LABEL: @shuffle_v2f64_22
+; SSE41: unpcklpd {{.*}} # xmm1 = xmm1[0,0]
+; SSE41-NEXT: movapd %xmm1, %xmm0
+; SSE41-NEXT: retq
%shuffle = shufflevector <2 x double> %a, <2 x double> %b, <2 x i32> <i32 2, i32 2>
ret <2 x double> %shuffle
}
; SSE3-LABEL: @insert_dup_reg_v2f64
; SSE3: unpcklpd {{.*}} # xmm0 = xmm0[0,0]
; SSE3-NEXT: retq
+;
+; FIXME: This should match movddup as well!
+; SSE41-LABEL: @insert_dup_reg_v2f64
+; SSE41: unpcklpd {{.*}} # xmm0 = xmm0[0,0]
+; SSE41-NEXT: retq
%v = insertelement <2 x double> undef, double %a, i32 0
%shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 0, i32 0>
ret <2 x double> %shuffle
; SSE3-LABEL: @insert_dup_mem_v2f64
; SSE3: movddup {{.*}}, %xmm0
; SSE3-NEXT: retq
+;
+; SSE41-LABEL: @insert_dup_mem_v2f64
+; SSE41: movddup {{.*}}, %xmm0
+; SSE41-NEXT: retq
%a = load double* %ptr
%v = insertelement <2 x double> undef, double %a, i32 0
%shuffle = shufflevector <2 x double> %v, <2 x double> undef, <2 x i32> <i32 0, i32 0>